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Job opening for EDA

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  • Andrew <wlzhu@yahoo.com>
    Please send your resume to emily.jing@latticesemi.com. Senior software developer with 5+ years experience in EDA industry. RESPONSIBILITIES: · Responsible for
    Message 1 of 1 , Feb 3, 2003
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      Please send your resume to emily.jing@....

      Senior software developer with 5+ years experience in EDA industry.

      RESPONSIBILITIES:
      · Responsible for development of state-of-art timing
      calculation and analyzer tools, including the following:
      · RC/driver-timing model for new FPGA routing resources.
      · Logic-block timing model for new FPGA architecture.
      · Delay estimation/calculation based on RC-tree, XY-location,
      logic level and etc.
      · Timing-driven-support for logic-optimization, floor-planner,
      placer and router.
      · Algorithms for path-tracing and timing-analyzer
      · Delay back-annotation for CAE simulators such as SDF, DTB and
      etc.
      · Netlist generator for back-annotated VHDL/Verilog netlist
      · Assist with evaluation of new FPGA architecture and routing
      resources
      · Assist with hardware-group to extract R/C and delay and match
      with SPICE

      EDUCATION/SKILLS:
      · 5+ years experience with VLSI EDA field
      · MS, PhD or equivalence in EE/CS
      · Knowledge of logic design and timing issues
      · Proficient with C/C++
      · Strong background in EDA algorithms and data structures
      · Problem independently solving skill
      FPGA tool development experience is preferred (but not required)
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