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Re: [softrock40] 2xAD9951 in Quadrature

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  • John D'Ausilio
    looks like they re not posted yet ,, just a message that sez he did it ... de w1rt/john
    Message 1 of 5 , Mar 2 10:02 AM
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      looks like they're not posted yet ,, just a message that sez he did it ...

      de w1rt/john

      On 3/2/06, Ford Peterson <ford@...> wrote:
      > Unfortunately, one must be a member of the group to see the details. Could you describe it better? Or is there a link to his website?
      >
      > Ford-N0FP
      > ford@...
      >
      >
      > ----- Original Message -----
      > From: "patt896" <d.patten@...>
      > To: <softrock40@yahoogroups.com>
      > Sent: Thursday, March 02, 2006 11:22 AM
      > Subject: [softrock40] 2xAD9951 in Quadrature
      >
      >
      > Gérard/F6EHJ just posted schematics, pcb's and code for
      > 2xAD9951 in synchronized mode to deliver I/Q signals or any phase
      > difference at http://groups.yahoo.com/group/dds-vfo.
      >
      > Dick Patten
      >
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      >
      >
      >
      > Yahoo! Groups Links
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      >
      >
      >
      >
      >
      >
      >
      >
      > Yahoo! Groups Links
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    • patt896
      Quoting Gérard/F6EHJ: Hi Craig, Just to say I succeeded to mount 2xAD9951 in synchronized mode to deliver I/Q signals or any phase difference. It works very
      Message 2 of 5 , Mar 2 1:35 PM
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        Quoting Gérard/F6EHJ:

        Hi Craig,

        Just to say I succeeded to mount 2xAD9951 in synchronized mode to
        deliver I/Q signals or any phase difference.

        It works very well and the phase adjustement is very easy.

        The system works properly at 500 MHz clock frequency (125x4).

        The total current is around 80mA.

        Command are issued of a PIC 16F877 clocked at 20MHz.

        Signals requested : S_DATA, S_CLK, IO/UD, CS_DDS0, CS_DDS1

        Best regards,

        Gérard/F6EHJ

        ----------------------------------------------------------------------

        The piece of code is already on the site.
        This is the minimum to load the 2XAD9951 and does not include the
        generation of the frequency word.
        The drawing showing 2XAD9951 on the AD datasheet page 24 has not been
        used.
        The clock is fed to both the DDS (as described on the page 20)using
        equal lenghts of coaxial cable (as requested). Clocks input are tied
        in parallel. The clock signal can be very small (<0dBm).
        Test have been done with a 125 MHz TTL 5V oscillator powered at 3.3V
        and feeding the 2 DDS through a 10nF cap.
        Tests performed at 500 MHz give excellent results. Attempts to use
        higher values of multiplier X5 (625 MHz) and X6 (750)give quadrature
        signal too but degrade the spretrum due to difficult PLL lock.
        All attempts to use the 500 MHz oscillator from IK0CG do not give good
        result in this configuration. I dont know why because it perfectly
        works with a DDS alone.
        The output amplifiers are in option, depending of the level required.
        Roughly -10 dBm are available at the output of the filters which is
        enough to drive a low level mixer like an AD831.
        The OPA2674 work well under +5V. However, provision has been made to
        power it with +7.5V or more. Due to non rail to rail specification, 5V
        p/p are obtainable with 7.5V which can be nice to drive a TTL mixer
        (FST...) or similar device.
        The resistor values to set the gain are wrong in the schematic. The
        final values will be computed according to the gain requested. A look
        to the OPA2674 datasheet could help.
        All comments are welcome....

        Best regards,

        Gérard/F6EHJ





        --- In softrock40@yahoogroups.com, "Ford Peterson" <ford@...> wrote:
        >
        > Unfortunately, one must be a member of the group to see the
        details. Could you describe it better? Or is there a link to his
        website?
        >
        > Ford-N0FP
        > ford@...
        >
        >
        > ----- Original Message -----
        > From: "patt896" <d.patten@...>
        > To: <softrock40@yahoogroups.com>
        > Sent: Thursday, March 02, 2006 11:22 AM
        > Subject: [softrock40] 2xAD9951 in Quadrature
        >
        >
        > Gérard/F6EHJ just posted schematics, pcb's and code for
        > 2xAD9951 in synchronized mode to deliver I/Q signals or any phase
        > difference at http://groups.yahoo.com/group/dds-vfo.
        >
        > Dick Patten
        >
        >
        >
        >
        >
        >
        > Yahoo! Groups Links
        >
      • Robert McGwier
        I have an evaluation board for the 9954 with two on it. The sync signal mechanism between them is solid. There is also the AD9958 which AD is really pushing
        Message 3 of 5 , Mar 2 1:46 PM
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          I have an evaluation board for the 9954 with two on it. The sync signal
          mechanism between them is solid.

          There is also the AD9958 which AD is really pushing hard for SDR. It is
          already a quadrature part.

          Bob



          patt896 wrote:
          > Quoting Gérard/F6EHJ:
          >
          > Hi Craig,
          >
          > Just to say I succeeded to mount 2xAD9951 in synchronized mode to
          > deliver I/Q signals or any phase difference.
          >
          > It works very well and the phase adjustement is very easy.
          >
          > The system works properly at 500 MHz clock frequency (125x4).
          >
          > The total current is around 80mA.
          >
          > Command are issued of a PIC 16F877 clocked at 20MHz.
          >
          > Signals requested : S_DATA, S_CLK, IO/UD, CS_DDS0, CS_DDS1
          >
          > Best regards,
          >
          > Gérard/F6EHJ
          >
          >


          --
          AMSAT VP Engineering. Member: ARRL, AMSAT-DL, TAPR, Packrats,
          NJQRP/AMQRP, QRP ARCI, QCWA, FRC. ARRL SDR Wrk Grp Chairman
          Laziness is the number one inspiration for ingenuity. Guilty as charged!
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