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Fw: [softrock40] DDS spurs, was Got my 5.0....Now what do I need?

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  • windy10605@juno.com
    Great info, Bill. It would be very useful to sweep the DSS-60, DDS-30 - QSD combination on a spectrum analyzer to see where the hot points are. I m of the
    Message 1 of 43 , Dec 31, 2005
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      Great info, Bill. It would be very useful to sweep the DSS-60, DDS-30 - QSD combination on a spectrum analyzer to see where the "hot points" are. I'm of the school where "real hardware doesn't lie". Maybe that's what N4HY did ?  If they are rounding errors would you think they got better/worse with a higher ref clock input ? How about lower 3.3V voltage ? Better DDS LPF (more poles) ? Add a divide by two D FF on the output ?
       
      I still think there is a pony in a divide by two Tayloe (not divide by four) and work on a reliable 50% duty cycle from the DDS clock output. That's what the COMBO cards have on them.
       
      73 Kees K5BCQ
       
      kd5tfd@...>
      Date: Fri, 30 Dec 2005 23:13:44 -0600
      Subject: [softrock40] DDS spurs, was  Got my 5.0....Now what do I need?
       
      I think what you are seeing is normal and is a fact of life with DDS's --
      they will generate spurs, and they will be dependent on the frequency the
      DDS is set to.   I don't claim to understand all the details of the
      mathematics behind it, but I believe the root cause of the spurs are
      essentially round off errors in the DAC in the DDS generating the sin
      wave.  As the DDS produces the sin wave it only has so many bits (10? in
      the case of a 9851) to represent the current value of the sin wav.  The
      round off error on these bits is the root cause of the spurs.  There are
      frequencies you can tune the DDS to where the round off error is less than
      others, and you will get fewer spurs.

      This is not fatal for an SDR - we've got 30-40 khz of DDS tuning
      flexibility with an SDR, one just needs to find a spot where the DDS spurs
      are minimal and then tune appropriately in software.  The current SDR 1000
      code has a spur reduction tuning algorithm that tunes to a minimal spur DDS
      point within about +/- 3khz of the desired DDS frequency and then varies
      the software tuning to compensate.  This is based on some work Bob McGweir
      (N4HY) did to figure out where the minimal spur points for the SDR 1000's
      DDS are (a 9854 I believe).   More aggressive  spur dodging is possible by
      mapping out where the spurs actually are and use that data to pick DDS
      frequencies.

      Cheers,

      Bill (kd5tfd)

      At 10:42 PM 12/30/2005, qrper723 wrote:

      >But I don't understand that the spurious
      occures or not as I change
      >the frequency of DDS. The spurious should
      occur constantly?
      >
      >73...hidehiko ja9mat


    • FRANCIS CARCIA
      Double balanced mixers love square wave LO and produce less distortion due to the speed through the switch point. A square wave is easier to filter into a sine
      Message 43 of 43 , Jan 24, 2006
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        Double balanced mixers love square wave LO and produce less distortion due to the speed through the switch point. A square wave is easier to filter into a sine than going the other way.

        KY1K <ky1k@...> wrote:
        At 09:25 PM 1/22/2006, you wrote:

        >Very true! I'm hoping some sharp fpga programmer figures out how to
        >make a variable frequency square wave because we don't need no
        >stinkin sine wave anyway.

        I'm sure this is highly debatable. If your frequency is low enough
        for a softrock-40 type application, then a square wave is fine.

        But, most of us need sinewaves............

        >The DDS has a way to go before it can compete with a good synthesizer design.
        >It is easy it is quick but it is not clean enough to be called premium grade.


        No argument here. DDS offers much though. A clean DDS would be a
        giant leap forward in the softrock type receiver/transceiver
        development effort.

        Does anyone know what frequency ECL logic can be clocked at?

        Art



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