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Re: 20/30M Daughterboard output voltage

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  • Len Warner
    ... Agreed, and everybody should make this check, but that doesn t tell you whether there is any safety margin over the two schmitt trigger thresholds range at
    Message 1 of 9 , Dec 31, 2007
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      At 1:57 pm ((PST)) Sat Dec 29, 2007, in Digest 2083 Bill Dumke wrote:
      >4c. Re: 20/30M Daughterboard output voltage
      > Posted by: "Bill Dumke" billd@... billspiro1
      > Date: Sat Dec 29, 2007 1:57 pm ((PST))
      >
      >In fact, that brings up another way of checking if the voltage is
      >adequate to drive the LO quadrature chain. Just take a DC voltmeter and
      >measure the voltage at the outputs of the frequency dividers to see if
      >ithey are 50% of the IC supply voltage. If it is not, you have a
      >problem. A square wave will produce a 50% duty cycle which can be
      >measured with the voltmeter. That is what you should be getting.

      Agreed, and everybody should make this check, but that doesn't tell
      you whether there is any safety margin over the two schmitt trigger
      thresholds range at the clock input of the first divider.

      If the voltage swing is only just sufficient then you could get a very
      elusive fault as the divider slips in and out of operation with small
      changes in temperature or power supply voltage - both of which
      might be caused by the divider slipping in and out of operation,
      or by switching form receive to transmit.

      Another technique which does not require a HF scope would be
      to make a diode RF probe for a high-impedance DC voltmeter.

      This would give comparative Vpp readings which are about one
      diode drop low but could be calibrated against the rail-to-rail
      switching CMOS output of an active divider stage.


      Regards, LenW
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