Re: Low-jitter oscillator generates any frequency from 10 MHz to 1.4 GHz
- --- In email@example.com, T Hoflich <km5h@...> wrote:
> AHH HA! So maybe it is too good to be true. I did wonder about the
> since I had not seen that before. I would be interested in whatyou find out.
> I was hoping that if this works out, Tony could offer it as an
> least. It would raise the cost of the current frequency options,but I hear of
> people using DDS60 and custom crystals which probably cost more.frequency
> It seems to me that one of the most common threads is changing the
> coverage. This could solve that for those people.<snip>
> Also, it could be a direct replacement or the new daughterboard.
> But, there is a lot of work to do.
> Tom, KM5H
> > Sounds good but unless someone is going to offer a kit, that
> > fit Tony's idea for the kits, which is to be inexpensive, thatone
> > part cost as much or possibly more than a SoftRock does now.noise in
> > I will be looking into it, but the fact that they define the
> > terms of "RMS" is not a good sign, that averaging makes thenumbers
> > look better than reality. I believe that that part will have morehave
> > noise than a ICS601 has that people complain about although they
> > not tried it.So, what if this was used as the master oscillator for a high-speed
> > Cecil
> > KD5NWA
> > www.softrockradio.org www.qrpradio.com
> > "Blessed are the cracked, for they shall let in the light."
DDS, instead of directly generating the RF frequency? For example,
if this was the clock input to an AD9951 at 500-600MHz, or the
upcoming AD9912, as the frequency is divided down, so is the jitter.
I'm not convinced that a DDS is truly dividing the jitter error in
the same way that a simple frequency divider does. But, RMS jitter
would probably be the more accurate measurement, wouldn't it? Since
a peak jitter variation would be largely "lost" in the ROM & D/A
stepping (accumulating) process, I think.
I would like to get a sample of both this and the IDT devices Phil
mentioned a while back. But, I don't have the test equipment to
measure jitter, so the testing would be subjective.
I am also thinking that if one of these devices was used as the DDS
clock input, one could dynamically alter the frequency of the DDS
clock, and possibly avoid some spurs. The I2C interface makes this