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Re: [midatlanticretro] IMSAI 8080 Front Panel debugging

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  • Rich Cini
    My IMSAI has a Z80 card and it works fine. I might check pins 20/70 (IIRC PROT and UNPROT) on the memory card to make sure they re not grounded (IEEE standard
    Message 1 of 6 , Jun 14, 2013
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      My IMSAI has a Z80 card and it works fine. I might check pins 20/70 (IIRC PROT and UNPROT) on the memory card to make sure they're not grounded (IEEE standard cards ground them but pre-standard don't) and that messes up the FP. 


      Rich Cini
      Sent from my iPhone


      On Jun 14, 2013, at 5:01 AM, John Sully <john@...> wrote:

       

      Hi everyone,

      I'm attempting to get my new IMSAI 8080 operational with the front panel.  This one has a Cromemco Z80 card in it. 

      I'm able to do everything except for the DEPOSIT operation with the front panel.  I've been able to read back some ROM contents and everything checks out.  I've also executed the ROM and it appears to be writing to memory fine.  However when I attempt to DEPOSIT my own instructions it will not save the data.  I do see the data briefly flash on the data lights for a split second.

      Did the front panel work properly with the Z80 card?  Is there anything I should check?  Any common causes for this failure?

      I've also verified I'm using an SRAM card (my earlier attempts at DRAM failed terribly).  Right now the Z80 cpu and the SRAM cards are the only ones in the system.

    • B Degnan
      MWrite conflict? -- Sent from my PDP 8/e.
      Message 2 of 6 , Jun 14, 2013
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        MWrite conflict?
        --
        Sent from my PDP 8/e.
      • joshbensadon
        If Examine is working, then the Z80 is co-operating with the FP. (Examine Next actually has the cpu execute a NOP instruction, which advances the PC to the
        Message 3 of 6 , Jun 14, 2013
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          If Examine is working, then the Z80 is co-operating with the FP.
          (Examine Next actually has the cpu execute a NOP instruction, which advances the PC to the next location).

          The Deposit function uses the same bus steering as the Examine, it's all in the Write signal. Like Rich said, your RAM is either write protected or like Bill said the FP isn't producing the Write pulse.

          Use a scope or logic probe and check for (deposit) write pulses on the FP, U14 pin 12, pin 11, U17 pin 10, pin 12, U25 pin 2, pin 3, pin 4, pin 6, pin 9&10, pin 8 and U24 pin 4 and pin 5 then on S-100 bus pin 68. That's the logic path from the switch through to the S-100 bus. If it gets to the S-100, the problem is with RAM or Write protect.

          Do you know how to take the front panel off? There are specific steps that make it easier to do. Let me know if you need them.

          Regards,
          Josh


          --- In midatlanticretro@yahoogroups.com, John Sully <john@...> wrote:
          >
          > Hi everyone,
          >
          > I'm attempting to get my new IMSAI 8080 operational with the front panel.
          > This one has a Cromemco Z80 card in it.
          >
          > I'm able to do everything except for the DEPOSIT operation with the front
          > panel. I've been able to read back some ROM contents and everything checks
          > out. I've also executed the ROM and it appears to be writing to memory
          > fine. However when I attempt to DEPOSIT my own instructions it will not
          > save the data. I do see the data briefly flash on the data lights for a
          > split second.
          >
          > Did the front panel work properly with the Z80 card? Is there anything I
          > should check? Any common causes for this failure?
          >
          > I've also verified I'm using an SRAM card (my earlier attempts at DRAM
          > failed terribly). Right now the Z80 cpu and the SRAM cards are the only
          > ones in the system.
          >
        • s100doctor
          ... There was a change needed to early IMSAI s about MWRITE. It ought to be in later documentation. imsai.net I believe has collected all updates to IMSAI 8080
          Message 4 of 6 , Jun 23, 2013
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            --- In midatlanticretro@yahoogroups.com, B Degnan <billdeg@...> wrote:
            >
            > MWrite conflict?
            > --

            There was a change needed to early IMSAI's about MWRITE. It ought to be in later documentation. imsai.net I believe has collected all updates to IMSAI 8080 docs in the version on their site.

            Also look at how deposit works on the front panel and confirm the one-shot timing is reasonable. All the one-shots (monostables) timing on the front panel are suspect as both chips and caps age over time.

            Finally, not all S-100 cards "obey" the IMSAI front panel. They may look for different signals for write than the IMSAI FP produces. YOu may have to work backwards from the RAM chip timing on whatever RAM card you have in use; or from the RAM card's timing docs to the bus; to see what is missing or wrong.

            The "flash" you see, may be front-panel data written to the bus briefly, but not "captured" by the RAM.

            Herb Johnson
            retrotechnology.com
          • who88777
            I ve finally figured this out! Since this post actually comes up highly in google searches I ll document my solution for posterity. Issue #1: The CCS 2810A
            Message 5 of 6 , Nov 14, 2013
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               I've finally figured this out!  Since this post actually comes up highly in google searches I'll document my solution for posterity.


              Issue #1:

              The CCS 2810A Outputs on both MWRITE and /PWR even though MWRITE is supposedly supposed to only have 1 driver (the front panel).  There is no jumper to resolve this so I resorted to bending out pin 13 of U37 which drives teh MWRITE output on the Z80 card.  Now the card will only use /PWR


              Issue #2

              The Wamemco 32K ram board was wired to only accept MWRITE (this is via a wire wrapped jumper).  My first attempt at a fix was to also bridge the /PWR connection forgetting that one would pull the other down resulting in a bus conflict.  With the current circuitry it really is an either-or situation.


              Which brings me to the final solution:

              Adding an OR gate to the wamemco card to accept either MWRITE or PWR (after it has gone through an inverter so the logic levels mean the same things).  I'm currently debating what the best permanent solution for this is.  I'll probably put a female socket on some breadboard and have it sit on top of the board.


              After the hours I've poured over the schematics I think I understand this machine fairly well now.

              -John


              ---In midatlanticretro@yahoogroups.com, <hjohnson@...> wrote:

              --- In midatlanticretro@yahoogroups.com, B Degnan <billdeg@...> wrote:
              >
              > MWrite conflict?
              > --

              There was a change needed to early IMSAI's about MWRITE. It ought to be in later documentation. imsai.net I believe has collected all updates to IMSAI 8080 docs in the version on their site.

              Also look at how deposit works on the front panel and confirm the one-shot timing is reasonable. All the one-shots (monostables) timing on the front panel are suspect as both chips and caps age over time.

              Finally, not all S-100 cards "obey" the IMSAI front panel. They may look for different signals for write than the IMSAI FP produces. YOu may have to work backwards from the RAM chip timing on whatever RAM card you have in use; or from the RAM card's timing docs to the bus; to see what is missing or wrong.

              The "flash" you see, may be front-panel data written to the bus briefly, but not "captured" by the RAM.

              Herb Johnson
              retrotechnology.com
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