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  • Evan Koblentz
    ... And ..... that was MARCH list message #25,000 all-time.
    Message 1 of 29 , Apr 1 7:30 PM
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      On 04/01/2012 03:15 PM, J. Chris Hausler wrote:
      > This was pretty common. Gimix used an external synchronous data separator in their 1771 based SS-30 "58" controller as well.
      >
      > 73, Chris Hausler


      And ..... that was MARCH list message #25,000 all-time.
    • joshbensadon
      Hi Bill, I m not sure I understand a partial port assignment . But you did give me new hope and off I went to check if there is a port conflict. After
      Message 2 of 29 , Apr 1 9:05 PM
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        Hi Bill,

        I'm not sure I understand a "partial port assignment".
        But you did give me new hope and off I went to check if there is a port conflict.

        After studying the Data Seperator circuit, it's a very nicely designed circuit that corrects the data/clock if it finds 5 missing clocks (ie, Data 00h misread). This I see makes the 6 00's of the IBM format invaluable for the data seperator to be in sync with the right pulses.

        Going into the 1771, I see clock pulses every 4uSec, I see data pulses every 8uSec (data pattern AA). The data is skewed by 2uSec.
        To me, this all looks good going in.

        Coming out, I scoped the Data Read strobe, it goes low for 1uSec.
        The data from the 1771 is high for the first 200nSec, but it then goes low, which is a data 1 (to the CPU) after the 74LS368's.
        This happens on all data lines, which fills the memory buffer with FF's instead of the AA's I expect.

        The 200nSec, co-incides with the Data Request Line going low. This DRQ line goes high well before I read the port and then goes low about 200nSec after I read the data port. I've confirmed the Read, Chip Select, A0, A1 lines. I thought and double checked that I am reading the right port. The DRQ line going low convinces me that I have the right port.

        I've tried a different 1771 chip, (not sure if either chip works really).

        I'm at my wits end, once again... any ideas?

        Time to buy more 1771's?









        --- In midatlanticretro@yahoogroups.com, B Degnan <billdeg@...> wrote:
        >
        > I am starting to think you may have a partial port assignment
        > problem. Maybe someone who knows more about the 1771 and Tarbell can
        > yey or ney this.
        > bd
        >
        > At 01:40 PM 4/1/2012, you wrote:
        > >Hi Guys...
        > >
        > >I'm still banging away at this 8" Disk Drive.
        > >
        > >One drive definitely has a problem with the read amp.
        > >The other drive seems to work fine, but it's my controller card
        > >that's giving the problem. Tarbell 1011.
        > >
        > >The Data/Clk seperator isn't working most of the time on most of the
        > >data patterns. But it does work some times when I record a track of
        > >0AAH's. When it reads back, it either reads as AA's, 55's or FF's.
        > >I can understand being off a bit and getting the 55's since there's
        > >no syncronizing, but the FF's is what I get 3 out of 4 times I read
        > >the same track. And if I write a track full of 0F0H's, then I only
        > >ever get a bunch of FF's back, no matter how many times I read. So,
        > >now my task has switched to understanding / repairing this seperator.
        > >
        > >When I'm not reading the disk (and the head is not loaded), I get
        > >the occassional data pulse from the disk, is this normal? Just noise?
        > >
        > >Does anyone have any idea why Tarbell would use their own data/clk
        > >seperator and not the one inside the WD1771 chip?
        > >
        > >Thanks for your ideas!
        > >
        > >Cheers,
        > >Josh
        > >
        > >
        > >
        > >
        > >------------------------------------
        > >
        > >Yahoo! Groups Links
        > >
        > >
        > >
        >
      • joshbensadon
        In my continuing quest to get this Tarbell controller running. I found out that if 2 data pulses are recieved between the clock pulses, I then get a pattern of
        Message 3 of 29 , Apr 3 4:10 AM
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          In my continuing quest to get this Tarbell controller running.

          I found out that if 2 data pulses are recieved between the clock pulses, I then get a pattern of AA (or 55) read from the chip.
          It's almost like the Clock and Data pin inputs on the FD 1771 are reversed???? But the data sheet show them correct to the schematic which matches the board.

          Does anyone know if there was ever some ECO on this chip or the Tarbell 1011 Controller?

          I've got some NOS 1771's on their way to me, gonna try them.

          I've scoped the data and clock. They are both 250nSec pulses, a little ringing but otherwise reasonablly square. The ringing might be my cheap probes? They are between 0V and 3.9V, I changed the driver chip from 74LS08 to 74HCT08 and brought the voltage to 0V-4.75V but this had no effect. According to the datasheet, this is all good.

          Does anyone have some more details of what's happening just inside the Data/Clock inputs of the 1771?

          Cheers,
          Josh
        • Bill Sudbrink
          Hi, Have you looked at the manual scan on Harte s site: http://www.hartetechnologies.com/manuals/Tarbell/Tarbell%20Single%20Density% 20Disk%20Controller.pdf It
          Message 4 of 29 , Apr 3 8:33 AM
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            Hi,

            Have you looked at the manual scan on Harte's site:


            http://www.hartetechnologies.com/manuals/Tarbell/Tarbell%20Single%20Density%
            20Disk%20Controller.pdf

            It has a lot of notes and addenda appended to it.

            Bill S.
          • Bill Sudbrink
            Some things I would check: Make sure FD1771 pin 25 is truly grounded. It is socketed, right? Did you reseat the 1771? Likewise, make sure you have a good
            Message 5 of 29 , Apr 3 8:56 AM
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              Some things I would check:

              Make sure FD1771 pin 25 is truly grounded. It is
              socketed, right? Did you reseat the 1771?

              Likewise, make sure you have a good clock signal on
              1771 pin 24.

              What does the 74ls175 (u33) look like? Is it socketed
              or soldered? Are its pins tarnished? Does the clock
              on pin 4 of the 175 look good?

              Basically, if any of the chips on the board are TI,
              socketed and have pins tarnished to black or almost
              black, it would probably be a good idea to gently lift
              and reseat them.

              Are the gate voltages on the 74ls08 (u36) good? If they
              are marginal, you might be getting noise in the signal.

              Bill S.
            • joshbensadon
              Hi Bill, Thanks for your ideas. ... Yes, it s 100% grounded. I measured less than .05 Ohms to ground on this pin. I ve reseated, and replaced the 1771 with 2
              Message 6 of 29 , Apr 3 8:26 PM
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                Hi Bill,

                Thanks for your ideas.

                > Make sure FD1771 pin 25 is truly grounded. It is
                > socketed, right? Did you reseat the 1771?

                Yes, it's 100% grounded. I measured less than .05 Ohms to ground on this pin.

                I've reseated, and replaced the 1771 with 2 other chips. Same results every time.

                > Likewise, make sure you have a good clock signal on
                > 1771 pin 24.

                Clock is good, 4v p-p, the low is about .2V there is a little ringing but I see that all the time (probably my probe), it's nothing severe.

                > What does the 74ls175 (u33) look like? Is it socketed
                > or soldered? Are its pins tarnished? Does the clock
                > on pin 4 of the 175 look good?

                On a socket, pins were tarnished, but I cleaned them with an eraser many steps ago. Data on pin 4 looks good, Clock on pin 9 looks a little slanted, I mean it has a slow rise/drop time. I would say 10% rise time, 10% drop, 80% at the high/low levels. 4V high, .2V low.

                > Basically, if any of the chips on the board are TI,
                > socketed and have pins tarnished to black or almost
                > black, it would probably be a good idea to gently lift
                > and reseat them.

                Great idea, did this on all chips a couple of days ago.

                > Are the gate voltages on the 74ls08 (u36) good? If they
                > are marginal, you might be getting noise in the signal.

                Yes, they are .2V low, 4V high coming in. 0V/4.75V going out because I replaced this chip with a 74HCT08. The 74LS08 was putting out the standard .2V / 4V levels.
                But thank you, you gave me another idea... add more decoupling capacitors! And double check the voltages around the 1771. The +12, +5 and -5 are all present and good.

                Here's the funny part, I tried grounding the DATA input, this chip is getting NO DATA, yet out comes a bunch of FF's ????
                The only time it gives something other than FF's is when the input pattern is AA's and the data seperator reverses the clock and data pulses. If 2 pulses come in on the data line then 1 pulse on the clock line, the chip reads all AA's (or 55's) to RAM.

                The routine I'm using to read the chip is right out of the Manual you described, yes, it's a very good manual, saved me days of work already. I've looked at that code 5 times already. I'm even scoping the data lines at strobe time and I see the FF's (inverted as 00's) on the 1771 data outputs. My latest pattern input is C0's, 2 data pulses appear very neat and sharp for every 8 clock's, but out comes FF!

                I'm running out of ideas.... next I think I'm going to replace all the chips around the Read/Write of this chip.

                Also, I found C7 missing from the 4Mhz clock, but the parts list doesn't list C7. I think it's only used for certain crystals.

                sigh.

                I am begining to think we should stop using floppy disks... not so reliable!
              • Bill Sudbrink
                Ok, here are a couple of weird things that have bit me in the past: Cracked pins. I have had TI pins crack in such a way that they looked good in place,
                Message 7 of 29 , Apr 4 7:12 AM
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                  Ok, here are a couple of weird things that have "bit" me
                  in the past:

                  Cracked pins. I have had TI pins crack in such a way that
                  they looked good in place, would test good with a probe but
                  were bad during a run. I've seen two kinds of cracks.
                  Warning, bad ASCII art follows:


                  | | <-1
                  | |
                  \ /
                  \ /
                  || <-2
                  ||
                  \/

                  I have seen cracks at position 1, right where the pin makes
                  the bend to go into the chip body. Straight across the bend
                  on a soldered chip. Almost invisible to the naked eye.
                  Pressure from a probe on top of the pin closed the crack and
                  made the pin look good under test.

                  I have seen cracks at position 2, at the bottom of the taper
                  where the pin narrows to its insertion width. I have seen this
                  in both soldered and socketed chips. In the socketed case, I
                  stupidly didn't notice the missing piece of pin through several
                  removal/insertions. Under test, it can behave just as above,
                  with the pressure on the pin closing the circuit.

                  On other thing I have seen exactly once was a case where the
                  pin from the socket was crumpled under the socket. This board
                  was probably machine assembled. The crumpled pin was making
                  intermittent contact with the solder pad that it had been
                  intended to be soldered to. It was one of those tall, solid
                  body sockets making the problem very difficult to see.

                  Bill S.
                • Evan Koblentz
                  ... That might be the post of the year.
                  Message 8 of 29 , Apr 4 7:51 AM
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                    >> I've seen two kinds of cracks. Warning, bad ASCII art follows

                    That might be the post of the year.
                  • joshbensadon
                    Hi Bill, Thanks, that s good solid advice. I found a #2 break on one of the front panel chips. Always good to check the pins of the sockets too. I ll give
                    Message 9 of 29 , Apr 4 2:48 PM
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                      Hi Bill,

                      Thanks, that's good solid advice. I found a #2 break on one of the front panel chips. Always good to check the pins of the sockets too. I'll give the board a good visual before moving the problem to a bread board (what would be my next step without your input).

                      I am also curious about the -5V. I saw some chips don't require it. But I think I have chips that do.

                      While fixing an Ohio Scientific Superboard, the extra pressure I applied to the pin when scoping it had it make contact to the socket. I caught on to this pretty quickly but it still tricked me at first.

                      Again, my biggest stumbling block on my 1771 problem is how it produces valid numbers when there are 2 data pulses for every clock pulse. This leads me to believe the CPU decoding/interfacing is correct, along with my code. I don't believe the data sheet and circuit could be wrong either. So there's something here that I've never seen before... but with a little patience and persistence I might have a good story to tell!

                      Cheers,
                      Josh


                      --- In midatlanticretro@yahoogroups.com, "Bill Sudbrink" <wh.sudbrink@...> wrote:
                      >
                      > Ok, here are a couple of weird things that have "bit" me
                      > in the past:
                      >
                      > Cracked pins. I have had TI pins crack in such a way that
                      > they looked good in place, would test good with a probe but
                      > were bad during a run. I've seen two kinds of cracks.
                      > Warning, bad ASCII art follows:
                      >
                      >
                      > | | <-1
                      > | |
                      > \ /
                      > \ /
                      > || <-2
                      > ||
                      > \/
                      >
                      > I have seen cracks at position 1, right where the pin makes
                      > the bend to go into the chip body. Straight across the bend
                      > on a soldered chip. Almost invisible to the naked eye.
                      > Pressure from a probe on top of the pin closed the crack and
                      > made the pin look good under test.
                      >
                      > I have seen cracks at position 2, at the bottom of the taper
                      > where the pin narrows to its insertion width. I have seen this
                      > in both soldered and socketed chips. In the socketed case, I
                      > stupidly didn't notice the missing piece of pin through several
                      > removal/insertions. Under test, it can behave just as above,
                      > with the pressure on the pin closing the circuit.
                      >
                      > On other thing I have seen exactly once was a case where the
                      > pin from the socket was crumpled under the socket. This board
                      > was probably machine assembled. The crumpled pin was making
                      > intermittent contact with the solder pad that it had been
                      > intended to be soldered to. It was one of those tall, solid
                      > body sockets making the problem very difficult to see.
                      >
                      > Bill S.
                      >
                    • joshbensadon
                      Yeah! Thanks for the Bad Ascii art warning! lol.
                      Message 10 of 29 , Apr 4 2:49 PM
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                        Yeah! Thanks for the Bad Ascii art warning! lol.



                        --- In midatlanticretro@yahoogroups.com, "Evan Koblentz" <evan@...> wrote:
                        >
                        > >> I've seen two kinds of cracks. Warning, bad ASCII art follows
                        >
                        > That might be the post of the year.
                        >
                      • Bill Sudbrink
                        ... Actually, that s old usenet code for be sure your viewer is set to a fixed width font or this won t make any sense . Bill S.
                        Message 11 of 29 , Apr 4 3:18 PM
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                          Joshbensadon wrote:
                          >
                          > Yeah! Thanks for the Bad Ascii art warning! lol.
                          >

                          Actually, that's old usenet code for "be sure your viewer is
                          set to a fixed width font or this won't make any sense".

                          Bill S.
                        • joshbensadon
                          ... I never joined usenet. How long ago was usenet popular? Is it still around? I recall the days of BBS s and all the cool ANSI art. There wasn t a need to
                          Message 12 of 29 , Apr 4 4:22 PM
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                            > Actually, that's old usenet code for "be sure your viewer is
                            > set to a fixed width font or this won't make any sense".
                            >
                            > Bill S.
                            >

                            I never joined usenet. How long ago was usenet popular? Is it still around? I recall the days of BBS's and all the cool ANSI art. There wasn't a need to worry about fixed width then, it was all 80 column.
                          • Dave McGuire
                            ... It s still around, and it s still active. I was shocked out of my gourd to find this out about a year ago. I thought it was completely dead. I was (among
                            Message 13 of 29 , Apr 4 4:31 PM
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                              On 04/04/2012 07:22 PM, joshbensadon wrote:
                              > I never joined usenet. How long ago was usenet popular? Is it still
                              > around?

                              It's still around, and it's still active. I was shocked out of my
                              gourd to find this out about a year ago. I thought it was completely dead.

                              I was (among other things) a news admin at a large ISP for a long
                              time. We bought one of the first SGI Origin 2000 systems to build a
                              news server; that was fun.

                              When I learned that it was still active, I built a news server here
                              and finagled my way into getting a news feed. I get all the major
                              hierarchies but no binaries. (I don't care about the binaries) The
                              technical groups, in particular, are wonderful. My news server receives
                              between 30,000 and 40,000 articles per day. (remember, that's not
                              including binaries!) Probably 1/3 of that is spam, but the rest is a
                              lot of good meat.

                              -Dave

                              --
                              Dave McGuire, AK4HZ
                              New Kensington, PA
                            • Dave McGuire
                              ... I ve seen this failure mode as well. In one case, microscopic examination revealed that the only thing holding the pin together was the thin layer of
                              Message 14 of 29 , Apr 4 4:34 PM
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                                On 04/04/2012 10:12 AM, Bill Sudbrink wrote:
                                > Ok, here are a couple of weird things that have "bit" me
                                > in the past:
                                >
                                > Cracked pins. I have had TI pins crack in such a way that
                                > they looked good in place, would test good with a probe but
                                > were bad during a run. I've seen two kinds of cracks.
                                > Warning, bad ASCII art follows:
                                >
                                >
                                > | | <-1
                                > | |
                                > \ /
                                > \ /
                                > || <-2
                                > ||
                                > \/
                                >
                                > I have seen cracks at position 1, right where the pin makes
                                > the bend to go into the chip body. Straight across the bend
                                > on a soldered chip. Almost invisible to the naked eye.
                                > Pressure from a probe on top of the pin closed the crack and
                                > made the pin look good under test.
                                >
                                > I have seen cracks at position 2, at the bottom of the taper
                                > where the pin narrows to its insertion width. I have seen this
                                > in both soldered and socketed chips. In the socketed case, I
                                > stupidly didn't notice the missing piece of pin through several
                                > removal/insertions. Under test, it can behave just as above,
                                > with the pressure on the pin closing the circuit.

                                I've seen this failure mode as well. In one case, microscopic
                                examination revealed that the only thing holding the pin together was
                                the thin layer of oxide. That was a serious pain to track down.

                                -Dave


                                --
                                Dave McGuire, AK4HZ
                                New Kensington, PA
                              • joshbensadon
                                I ve been struggling with this Tarbell 1011 controller using the FD 1771 controller for a couple of weeks. I kept getting FF s out while I was watching good
                                Message 15 of 29 , Apr 6 7:47 AM
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                                  I've been struggling with this Tarbell 1011 controller using the FD 1771 controller for a couple of weeks.

                                  I kept getting FF's out while I was watching good data go in.
                                  The only time I got any other data, was when the (external) Clock/Data seperator swapped the clock & data.

                                  I looked everywhere for the problem. I even made my own Clock/Data test pattern generator to give clean pulses. Once again, only when I reverse Clock and Data does it seem to work.

                                  So, I swaped the Clock and Data. Curiously, the circuit now works!

                                  The first ID field looks like this...
                                  FE 00 00 01 00 D2 C3

                                  I am assuming the CRC (D2C3) is correct.

                                  Does anyone have any ERRATA on the FD 1771 Floppy Drive controller?

                                  I am curious if anyone else out there has any schematics or circuits using the FD 1771 with external data seperator and would you confirm Pin 27 for Data, Pin 26 for Clock (as per data sheet) or are these truely reversed?

                                  PS. Thank you to everyone for all the help, support and invaluable idea's given. And sorry for the mess of hair on the floor :)
                                • B Degnan
                                  Herb Johnson would know a lot about that stuff, but he is not usually checking this list. He can be contacted through his web site retrotechnology.com
                                  Message 16 of 29 , Apr 6 8:12 AM
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                                    Herb Johnson would know a lot about that stuff, but he is not usually
                                    checking this list. He can be contacted through his web site
                                    retrotechnology.com
                                    http://www.retrotechnology.com/herbs_stuff/s100bus.html
                                    Bill

                                    At 10:47 AM 4/6/2012, you wrote:
                                    >I've been struggling with this Tarbell 1011 controller using the FD
                                    >1771 controller for a couple of weeks.
                                    >
                                    >I kept getting FF's out while I was watching good data go in.
                                    >The only time I got any other data, was when the (external)
                                    >Clock/Data seperator swapped the clock & data.
                                    >
                                    >I looked everywhere for the problem. I even made my own Clock/Data
                                    >test pattern generator to give clean pulses. Once again, only when
                                    >I reverse Clock and Data does it seem to work.
                                    >
                                    >So, I swaped the Clock and Data. Curiously, the circuit now works!
                                    >
                                    >The first ID field looks like this...
                                    >FE 00 00 01 00 D2 C3
                                    >
                                    >I am assuming the CRC (D2C3) is correct.
                                    >
                                    >Does anyone have any ERRATA on the FD 1771 Floppy Drive controller?
                                    >
                                    >I am curious if anyone else out there has any schematics or circuits
                                    >using the FD 1771 with external data seperator and would you confirm
                                    >Pin 27 for Data, Pin 26 for Clock (as per data sheet) or are these
                                    >truely reversed?
                                    >
                                    >PS. Thank you to everyone for all the help, support and invaluable
                                    >idea's given. And sorry for the mess of hair on the floor :)
                                    >
                                    >
                                    >
                                    >
                                    >
                                    >------------------------------------
                                    >
                                    >Yahoo! Groups Links
                                    >
                                    >
                                    >
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