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Re: [midatlanticretro] Z80<->8088 adaptability?

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  • Dan Roganti
    Richard A. Cini wrote: Z80 8088 adaptability? All: Does anyone know if an expansion bus based on the ECB-standard (which has several Z80-specific signals)
    Message 1 of 4 , Sep 2 8:43 PM
      Richard A. Cini wrote:
      Z80<->8088 adaptability?All:

          Does anyone know if an expansion bus based on the ECB-standard (which has several Z80-specific signals) can be adapted for use with the 8088 or 8086? I want to try to add an 8088-based CPU card to the N8VEM project, and there are signals relating to bus arbitration on the Z80 (*BUSRQ, *BUSACK, *WAIT, and *HALT) that don’t exist on the 8088 although they could possibly be synthesized using other pins and some glue. I guess what I’m looking for is someone to tell me (1) I’m crazy and it won’t work or (2) it’s possible and this is what I need to look into. I know that the DEC Rainbow used both a Z80 and an 8088, but I’m having trouble locating schematics to check it out.

          Any help is appreciated!



      You want to use the 8086 configured to Minimum mode, pin 33. The Bus arbitrations signals are on pins 30,31 are called HLDA(ack signal) and HOLD(req signal),  they are active high signals. These are the same ones as on the 8080 when using the S-100 bus--except *HOLD is active Low on the S-100 bus. As you know the Z80 bus arbitration signals are active low, so you'll need inverting buffer for the active Hi HOLD signal on the 8086 card.  The HALT status is then indicated by a Hi pulse on the ALE signal only, pin 25 -- and no other control signals are active -- so you want to add some glue logic here to encode this for the Halt signal to the ECB backplane. The WAIT state is activated with the active low  *TEST signal, pin 23. You'll have to make sure the timing is right since the setup time can be different and the inputs are synchronous. You'll find more info about this in the 8086 databook.

      you N8VEM guys are getting to wacky for me :)
      hope this helps

      =Dan

    • Richard A. Cini
      That¹s whacky in a good way, right? Anyway, I was able to map everything out today using the minimum mode of the 8088. I had one of those ³duh² moments this
      Message 2 of 4 , Sep 3 3:55 PM
        Re: [midatlanticretro] Z80<->8088 adaptability? That’s whacky in a good way, right?

        Anyway, I was able to map everything out today using the minimum mode of the 8088. I had one of those “duh” moments this morning and realized that the signals were staring right at me. I have a schematic done but I have to re-draw it for clarity.

        On the /WAIT signal, if you use the 8284 system clock generator, it has a pin that can be used to create wait states and other things. You basically use a flip-flop and an AND gate with the clock and that will drop the READY signal on the 8088 and stop execution — an infinite wait state.

        On the HOLD/HLDA, I synchronized them to the clock using an LS74 flip-flop. I think that should work, but I need to wire-wrap this thing and see if it actually does :-)

        Thanks for the help!

        On 9/2/09 11:43 PM, "Dan Roganti" <ragooman@...> wrote:


         
         

        Richard A. Cini wrote:
         Z80<->8088 adaptability?  All:
         
            Does anyone know if an expansion bus based on the ECB-standard (which has several Z80-specific signals) can be adapted for use with the 8088 or 8086? I want to try to add an 8088-based CPU card to the N8VEM project, and there are signals relating to bus arbitration on the Z80 (*BUSRQ, *BUSACK, *WAIT, and *HALT) that don’t exist on the 8088 although they could possibly be synthesized using other pins and some glue. I guess what I’m looking for is someone to tell me (1) I’m crazy and it won’t work or (2) it’s possible and this is what I need to look into. I know that the DEC Rainbow used both a Z80 and an 8088, but I’m having trouble locating schematics to check it out.
         
            Any help is appreciated!
         
         
         

        You want to use the 8086 configured to Minimum mode, pin 33. The Bus arbitrations signals are on pins 30,31 are called HLDA(ack signal) and HOLD(req signal),  they are active high signals. These are the same ones as on the 8080 when using the S-100 bus--except *HOLD is active Low on the S-100 bus. As you know the Z80 bus arbitration signals are active low, so you'll need inverting buffer for the active Hi HOLD signal on the 8086 card.  The HALT status is then indicated by a Hi pulse on the ALE signal only, pin 25 -- and no other control signals are active -- so you want to add some glue logic here to encode this for the Halt signal to the ECB backplane. The WAIT state is activated with the active low  *TEST signal, pin 23. You'll have to make sure the timing is right since the setup time can be different and the inputs are synchronous. You'll find more info about this in the 8086 databook.

        you N8VEM guys are getting to wacky for me :)
        hope this helps

        =Dan




        Rich

        --
        Rich Cini
        Collector of Classic Computers
        Build Master and lead engineer, Altair32 Emulator
        http://www.altair32.com
        http://www.classiccmp.org/cini
      • Christian Liendo
        http://a2central.com/1849/vintage-computer-festival-east-6-0/
        Message 3 of 4 , Sep 3 7:03 PM
          http://a2central.com/1849/vintage-computer-festival-east-6-0/

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