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Digital Dictation Machine using Leon/XESS XSV-800

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  • Rainer Dorsch
    Hello, after a long time of development, Daniel Bretz has finished his work with Leon. I ve put all my design files and the scripts on the web. My working
    Message 1 of 6 , Jan 18 9:28 AM
      Hello,

      after a long time of development, Daniel Bretz has finished his work with
      Leon. I've put all my design files and the scripts on the web. My working
      environment is SynopsysDC, Mentor ModelSIM, Xilinx Alliance 3.2i and as
      prototyping board the XSV-800 from Xess with a Xilinx Virtex XCV800.

      The files can be found at http://www.ra.informatik.uni-stuttgart.de/Leon/

      There is also a port of the Xess command line tools to Linux. This version
      supports the upload of exo-files, too.


      There are still some questions left. Has anybody experience with loading
      the Leon design from the FlashRAM to the FPGA? My programs sometimes fail
      during startup process, when I use the the FlashRAM as boot ROM. The problem
      occurs sometimes after reseting the CPU or after turning the power of the
      board on, which leads to a new initialization of the FPGA.

      Can anybody guess, if this is a design problem or a problem of the board?
      Maybe somebody has seen the same problem before.


      Another question is about the normal compile environment? I've recognized
      that the dynamic memory allocation (malloc(), free()) and the using of
      the library times (used by the dhrystone bench) don't work. Is this,
      because there is no operating system under the static clib, or is this a bug?
      How can I run the dhrystone benchmark?


      greetings,
      from Daniel Bretz

      --
      Rainer Dorsch
      Abt. Rechnerarchitektur e-mail:rainer.dorsch@...-stuttgart.de
      Uni Stuttgart Tel.: +49-711-7816-215 / Fax: +49-711-7816-288
      Breitwiesenstr. 20-22 D-70565 Stuttgart
    • rene@dimes.tudelft.nl
      ... with ... working ... and as ... http://www.ra.informatik.uni-stuttgart.de/Leon/ ... version ... loading ... fail ... problem ... of the ... board? ... Yes,
      Message 2 of 6 , Jan 19 1:23 AM
        --- In leon_sparc@egroups.com, Rainer Dorsch <rainer.dorsch@i...>
        wrote:
        >
        > Hello,
        >
        > after a long time of development, Daniel Bretz has finished his work
        with
        > Leon. I've put all my design files and the scripts on the web. My
        working
        > environment is SynopsysDC, Mentor ModelSIM, Xilinx Alliance 3.2i
        and as
        > prototyping board the XSV-800 from Xess with a Xilinx Virtex XCV800.
        >
        > The files can be found at
        http://www.ra.informatik.uni-stuttgart.de/Leon/
        >
        > There is also a port of the Xess command line tools to Linux. This
        version
        > supports the upload of exo-files, too.
        >
        >
        > There are still some questions left. Has anybody experience with
        loading
        > the Leon design from the FlashRAM to the FPGA? My programs sometimes
        fail
        > during startup process, when I use the the FlashRAM as boot ROM. The
        problem
        > occurs sometimes after reseting the CPU or after turning the power
        of the
        > board on, which leads to a new initialization of the FPGA.
        >
        > Can anybody guess, if this is a design problem or a problem of the
        board?
        > Maybe somebody has seen the same problem before.

        Yes, we have seen the same behaviour. We use 2 types of power supply.
        An standard ATX supply and a 9VDC (24W) external power supply.
        When we use the ATX supply booting from the flashram fails 8 times
        out-of 10.
        When we use the 9VDC supply booting from the flashram just simply
        always works.....


        >
        >
        > Another question is about the normal compile environment? I've
        recognized
        > that the dynamic memory allocation (malloc(), free()) and the using
        of
        > the library times (used by the dhrystone bench) don't work. Is
        this,
        > because there is no operating system under the static clib, or is
        this a bug?
        > How can I run the dhrystone benchmark?
        >
        >
        > greetings,
        > from Daniel Bretz
        >
        > --
        > Rainer Dorsch
        > Abt. Rechnerarchitektur e-mail:rainer.dorsch@i...
        > Uni Stuttgart Tel.: +49-711-7816-215 / Fax:
        +49-711-7816-288
        > Breitwiesenstr. 20-22 D-70565 Stuttgart
      • jlin@jta.com
        Hi Daniel, I ve tried your DDM on our SV-800 board from XESS. Unfortunately, only the reset button seems to work. I see double zero s on the 7 segment LEDs
        Message 3 of 6 , Feb 8, 2001
          Hi Daniel,

          I've tried your DDM on our SV-800 board from XESS. Unfortunately,
          only the reset button seems to work. I see double zero's on the
          7 segment LEDs and the lower 3 bars of the bar LED are also on.

          I am not able to record or play back. It is not documented how
          to use the dictation machine. How long do I hold the buttons
          down? I'm using a mic for the stereo in and headphones for the
          stereo out. Any help on the usage would be appreciated.

          Do to my difficulties I've been trying to rebuild your exo and
          svf files, but am confused as to which vhd files are the sources.
          Can you walk me through your ddm and cpld directories?

          John Lin



          --- In leon_sparc@y..., Rainer Dorsch <rainer.dorsch@i...> wrote:
          >
          > Hello,
          >
          > after a long time of development, Daniel Bretz has finished his work
          with
          > Leon. I've put all my design files and the scripts on the web. My
          working
          > environment is SynopsysDC, Mentor ModelSIM, Xilinx Alliance 3.2i
          and as
          > prototyping board the XSV-800 from Xess with a Xilinx Virtex XCV800.
          >
          > The files can be found at
          http://www.ra.informatik.uni-stuttgart.de/Leon/
          >
          > There is also a port of the Xess command line tools to Linux. This
          version
          > supports the upload of exo-files, too.
          >
          >
          > There are still some questions left. Has anybody experience with
          loading
          > the Leon design from the FlashRAM to the FPGA? My programs sometimes
          fail
          > during startup process, when I use the the FlashRAM as boot ROM. The
          problem
          > occurs sometimes after reseting the CPU or after turning the power
          of the
          > board on, which leads to a new initialization of the FPGA.
          >
          > Can anybody guess, if this is a design problem or a problem of the
          board?
          > Maybe somebody has seen the same problem before.
          >
          >
          > Another question is about the normal compile environment? I've
          recognized
          > that the dynamic memory allocation (malloc(), free()) and the using
          of
          > the library times (used by the dhrystone bench) don't work. Is this,
          > because there is no operating system under the static clib, or is
          this a bug?
          > How can I run the dhrystone benchmark?
          >
          >
          > greetings,
          > from Daniel Bretz
          >
          > --
          > Rainer Dorsch
          > Abt. Rechnerarchitektur e-mail:rainer.dorsch@i...
          > Uni Stuttgart Tel.: +49-711-7816-215 / Fax:
          +49-711-7816-288
          > Breitwiesenstr. 20-22 D-70565 Stuttgart
        • matousek
          Hi John, look inside the documentation for XSV800 board (you mean probably this board). The stereo input does not include any amplifier. So, you have to use a
          Message 4 of 6 , Feb 9, 2001
            Hi John,

            look inside the documentation for XSV800 board (you mean probably this
            board). The stereo input does not include any amplifier. So, you have
            to use a simple amplifier as described in codec data-sheet.

            I used a computer sound card to do this (not for ddm, but for one
            of my designs). Just before you start to use the card, be sure
            about the maximal voltage level from the card and compare it
            to max voltage described in codec manual.

            Rudolf


            jlin@... wrote:
            >
            > Hi Daniel,
            >
            > I've tried your DDM on our SV-800 board from XESS. Unfortunately,
            > only the reset button seems to work. I see double zero's on the
            > 7 segment LEDs and the lower 3 bars of the bar LED are also on.
            >
            > I am not able to record or play back. It is not documented how
            > to use the dictation machine. How long do I hold the buttons
            > down? I'm using a mic for the stereo in and headphones for the
            > stereo out. Any help on the usage would be appreciated.
            >
            > Do to my difficulties I've been trying to rebuild your exo and
            > svf files, but am confused as to which vhd files are the sources.
            > Can you walk me through your ddm and cpld directories?
            >
            > John Lin
            >
            >
          • Rainer Dorsch
            Hi John, due to the limited number of buttons, recording is a bit tricky: You need to press the middle buttons concurrently. To stop press button 1 (if
            Message 5 of 6 , Feb 9, 2001
              Hi John,

              due to the limited number of buttons, recording is a bit tricky:

              You need to press the middle buttons concurrently. To stop press button 1 (if
              numbered from 0 to 3), to playback also press button 1, deleting, press button
              2 and 3, reset is button 0.

              Good luck.

              Rainer.

              > Hi Daniel,
              >
              > I've tried your DDM on our SV-800 board from XESS. Unfortunately,
              > only the reset button seems to work. I see double zero's on the
              > 7 segment LEDs and the lower 3 bars of the bar LED are also on.
              >
              > I am not able to record or play back. It is not documented how
              > to use the dictation machine. How long do I hold the buttons
              > down? I'm using a mic for the stereo in and headphones for the
              > stereo out. Any help on the usage would be appreciated.
              >
              > Do to my difficulties I've been trying to rebuild your exo and
              > svf files, but am confused as to which vhd files are the sources.
              > Can you walk me through your ddm and cpld directories?
              >
              > John Lin
              >
              >
              >
              > --- In leon_sparc@y..., Rainer Dorsch <rainer.dorsch@i...> wrote:
              > >
              > > Hello,
              > >
              > > after a long time of development, Daniel Bretz has finished his work
              > with
              > > Leon. I've put all my design files and the scripts on the web. My
              > working
              > > environment is SynopsysDC, Mentor ModelSIM, Xilinx Alliance 3.2i
              > and as
              > > prototyping board the XSV-800 from Xess with a Xilinx Virtex XCV800.
              > >
              > > The files can be found at
              > http://www.ra.informatik.uni-stuttgart.de/Leon/
              > >
              > > There is also a port of the Xess command line tools to Linux. This
              > version
              > > supports the upload of exo-files, too.
              > >
              > >
              > > There are still some questions left. Has anybody experience with
              > loading
              > > the Leon design from the FlashRAM to the FPGA? My programs sometimes
              > fail
              > > during startup process, when I use the the FlashRAM as boot ROM. The
              > problem
              > > occurs sometimes after reseting the CPU or after turning the power
              > of the
              > > board on, which leads to a new initialization of the FPGA.
              > >
              > > Can anybody guess, if this is a design problem or a problem of the
              > board?
              > > Maybe somebody has seen the same problem before.
              > >
              > >
              > > Another question is about the normal compile environment? I've
              > recognized
              > > that the dynamic memory allocation (malloc(), free()) and the using
              > of
              > > the library times (used by the dhrystone bench) don't work. Is this,
              > > because there is no operating system under the static clib, or is
              > this a bug?
              > > How can I run the dhrystone benchmark?
              > >
              > >
              > > greetings,
              > > from Daniel Bretz
              > >
              > > --
              > > Rainer Dorsch
              > > Abt. Rechnerarchitektur e-mail:rainer.dorsch@i...
              > > Uni Stuttgart Tel.: +49-711-7816-215 / Fax:
              > +49-711-7816-288
              > > Breitwiesenstr. 20-22 D-70565 Stuttgart
              >
              >
              >
              >
              >
              >
            • jlin@jta.com
              Hi Rainer/Matousek Thank you for your insights. I definitely need amplified stereo inputs otherwise everything is muffled. The button layout is difficult to
              Message 6 of 6 , Feb 12, 2001
                Hi Rainer/Matousek

                Thank you for your insights.

                I definitely need amplified stereo inputs otherwise everything
                is muffled.

                The button layout is difficult to master. Two notes with
                regards to the button functions. To stop rec or playback use
                button 1, next to the reset button. This is incorrectly
                documented as button 3 in a README file. To record first
                press button 2 then press button 1, this combination seems
                to work all the time versus simultaneous pushes of both
                2 and 1.

                Rainer, thanks for the DDM design it functions nicely and now
                I'm off to get "hello world" working.

                John Lin



                --- In leon_sparc@y..., Rainer Dorsch <rainer.dorsch@i...> wrote:
                >
                > Hi John,
                >
                > due to the limited number of buttons, recording is a bit tricky:
                >
                > You need to press the middle buttons concurrently. To stop press
                button 1 (if
                > numbered from 0 to 3), to playback also press button 1, deleting,
                press button
                > 2 and 3, reset is button 0.
                >
                > Good luck.
                >
                > Rainer.
                >
                > > Hi Daniel,
                > >
                > > I've tried your DDM on our SV-800 board from XESS. Unfortunately,
                > > only the reset button seems to work. I see double zero's on the
                > > 7 segment LEDs and the lower 3 bars of the bar LED are also on.
                > >
                > > I am not able to record or play back. It is not documented how
                > > to use the dictation machine. How long do I hold the buttons
                > > down? I'm using a mic for the stereo in and headphones for the
                > > stereo out. Any help on the usage would be appreciated.
                > >
                > > Do to my difficulties I've been trying to rebuild your exo and
                > > svf files, but am confused as to which vhd files are the sources.
                > > Can you walk me through your ddm and cpld directories?
                > >
                > > John Lin
                > >
                > >
                > >
                > > --- In leon_sparc@y..., Rainer Dorsch <rainer.dorsch@i...> wrote:
                > > >
                > > > Hello,
                > > >
                > > > after a long time of development, Daniel Bretz has finished his
                work
                > > with
                > > > Leon. I've put all my design files and the scripts on the web.
                My
                > > working
                > > > environment is SynopsysDC, Mentor ModelSIM, Xilinx Alliance
                3.2i
                > > and as
                > > > prototyping board the XSV-800 from Xess with a Xilinx Virtex
                XCV800.
                > > >
                > > > The files can be found at
                > > http://www.ra.informatik.uni-stuttgart.de/Leon/
                > > >
                > > > There is also a port of the Xess command line tools to Linux.
                This
                > > version
                > > > supports the upload of exo-files, too.
                > > >
                > > >
                > > > There are still some questions left. Has anybody experience with
                > > loading
                > > > the Leon design from the FlashRAM to the FPGA? My programs
                sometimes
                > > fail
                > > > during startup process, when I use the the FlashRAM as boot ROM.
                The
                > > problem
                > > > occurs sometimes after reseting the CPU or after turning the
                power
                > > of the
                > > > board on, which leads to a new initialization of the FPGA.
                > > >
                > > > Can anybody guess, if this is a design problem or a problem of
                the
                > > board?
                > > > Maybe somebody has seen the same problem before.
                > > >
                > > >
                > > > Another question is about the normal compile environment? I've
                > > recognized
                > > > that the dynamic memory allocation (malloc(), free()) and the
                using
                > > of
                > > > the library times (used by the dhrystone bench) don't work. Is
                this,
                > > > because there is no operating system under the static clib, or
                is
                > > this a bug?
                > > > How can I run the dhrystone benchmark?
                > > >
                > > >
                > > > greetings,
                > > > from Daniel Bretz
                > > >
                > > > --
                > > > Rainer Dorsch
                > > > Abt. Rechnerarchitektur e-mail:rainer.dorsch@i...
                > > > Uni Stuttgart Tel.: +49-711-7816-215 / Fax:
                > > +49-711-7816-288
                > > > Breitwiesenstr. 20-22 D-70565 Stuttgart
                > >
                > >
                > >
                > >
                > >
                > >
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