DRAGONFLY 1 micro core is ready
- The LEOX team is pleased to announce its first release of the DRAGONFLY
Have a look at http://www.leox.org/resources/dvlp.html#RES_DVLP_DGF
The DRAGONFLY micro core has been designed as a small (less than 4K
fast and programmable core, to be used in an ASIC or a FPGA, in areas
serial communication management (UART, Smart cards controllers, LDC
I²C controllers, SPI controllers), on-chip test and debug of complex
intelligent DMA, FLASH controllers, audio-rate SDRAM controllers, and so
The advantages of having a programmable core on an ASIC to perform
tasks are obvious:
- writing and debugging software code is faster than designing the
function in hardware.
- it is possible to reload the software in the ASIC, to correct bugs
change the functionality.
The Dragonfly core however, is not well suited to be used as a general
processor. It has no interrupt mechanism (this has been chosen for
of implementation), and as such it can't handle true real-time tasks
tasks should be handled inside a peripheral if needed). The core has no
multiply/divide instruction, and its arithmetic capability are basic.
The philosophy behind the core is that, real-time and complex arithmetic
are handled inside adapted peripherals (serial interfaces, FIFOs,
operators, Timers, etc.), while the core itself is responsible for
configuration, data motion and interpretation, complex state machine
complex decisions calculations.
Writing software for the DRAGONFLY is done using a simple, easy to use
easy to learn assembly language. Available software tools are:
- a complete macro assembler (that runs on Linux, Solaris and
- an Emacs mode for easy assembly code edition.
- a tcl/Tk based debugger to be used (only) with the Modelsim VHDL
The LEOX team
http://www.leox.org : Free Hardware and Software Resources for