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Re: [jallist] new errata 16F62X

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  • Eur van Andel
    ... [..] ... One more reason to ditch LVP. ir EE van Andel eur@fiwihex.nl www.fiwihex.nl Fiwihex B.V. Wierdensestraat 74, NL7604BK Almelo, Netherlands
    Message 1 of 9 , Jun 1 12:15 AM
      On 31 May, 2005, at 22:27, Stef Mientki wrote:

      > see:
      > http://ww1.microchip.com/downloads/en/DeviceDoc/80073G.pdf
      >
      > Stef

      > If RB4 goes high for any reason during high volt-
      > age programming with LVP enabled, the program-
      > ming will be interrupted.

      Better disable LVP altogether:

      > Work around
      > Pull RB4 (pin 10) to ground during the initial pro-
      > gramming to prevent programming interruptions.
      > Once LVP has been disabled, it remedies this

      [..]

      > Module: MCLR/RA5 in LVP Mode
      > When the PIC16F62X device has LVP enabled,
      > MCLR is always enabled, regardless of the
      > CONFIG register settings.
      One more reason to ditch LVP.


      ir EE van Andel eur@... www.fiwihex.nl
      Fiwihex B.V. Wierdensestraat 74, NL7604BK Almelo, Netherlands
      tel+31-546-491106 fax+31-546-491107
    • Stef Mientki
      Finally a good reason for shadowing the TRIS registers. As I read the notes on TRISB, it s better to use always shadow registers on the TRIS registers. Stef
      Message 2 of 9 , Jun 1 12:20 AM
        Finally a good reason for shadowing the TRIS registers.
        As I read the notes on TRISB,
        it's better to use always shadow registers on the TRIS registers.
        Stef

        Stef Mientki wrote:

        >see:
        > http://ww1.microchip.com/downloads/en/DeviceDoc/80073G.pdf
        >
        >Stef
        >
        >
        >
        >Yahoo! Groups Links
        >
        >
        >
        >
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      • Wouter van Ooijen
        ... I can t make any sense of that section. What is the data direction state *on the port pins* ? There is no direction on the port pins, only a level. And
        Message 3 of 9 , Jun 1 1:54 AM
          > Finally a good reason for shadowing the TRIS registers.
          > As I read the notes on TRISB,
          > it's better to use always shadow registers on the TRIS registers.
          > > http://ww1.microchip.com/downloads/en/DeviceDoc/80073G.pdf

          I can't make any sense of that section. What is 'the data direction
          state *on the port pins*'? There is no direction on the port pins, only
          a level. And the circuit diagram shows a read of the TRIS returning the
          correct info, that is: what was written to the TRIS.

          Wouter van Ooijen

          -- -------------------------------------------
          Van Ooijen Technische Informatica: www.voti.nl
          consultancy, development, PICmicro products
          docent Hogeschool van Utrecht: www.voti.nl/hvu
        • Wouter van Ooijen
          ... OK, I get it. When a peripheral is activated this will (in some cases) override the TRIS setting. In that case the value read from the TRIS is the value
          Message 4 of 9 , Jun 1 2:02 AM
            > I can't make any sense of that section.

            OK, I get it. When a peripheral is activated this will (in some cases)
            override the TRIS setting. In that case the value read from the TRIS is
            the value including the override. So indeed shadowing makes sense.

            Wouter van Ooijen

            -- -------------------------------------------
            Van Ooijen Technische Informatica: www.voti.nl
            consultancy, development, PICmicro products
            docent Hogeschool van Utrecht: www.voti.nl/hvu
          • Snail Instruments
            ... But only in the rare case when you activate peripheral, make some RMW operation no the tris register and then deactivate the peripheral. After this
            Message 5 of 9 , Jun 1 2:44 AM
              >the value including the override. So indeed shadowing makes sense.

              But only in the rare case when you activate peripheral, make some RMW
              operation no the tris register and then deactivate the peripheral. After
              this operation the tris register will contain different value then desired.

              Josef
            • Wouter van Ooijen
              ... Indeed. Rare cases tend to take up a disproportional amount of debugging time, so IMHO it is worth the effort to shield you from those rare effects. Wouter
              Message 6 of 9 , Jun 1 4:00 AM
                > >the value including the override. So indeed shadowing makes sense.
                >
                > But only in the rare case when you activate peripheral, make some RMW
                > operation no the tris register and then deactivate the
                > peripheral. After
                > this operation the tris register will contain different value
                > then desired.

                Indeed. Rare cases tend to take up a disproportional amount of debugging
                time, so IMHO it is worth the effort to shield you from those rare
                effects.

                Wouter van Ooijen

                -- -------------------------------------------
                Van Ooijen Technische Informatica: www.voti.nl
                consultancy, development, PICmicro products
                docent Hogeschool van Utrecht: www.voti.nl/hvu
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