Crystal Oscillator(From Goran Olsson)
The world is full of xtal oscillators twiddled by digital designers lacking in the analog design knowledge necessary. Just look at all the PC real time clocks that lags or leads by several minutes per day. And they eat backup batteries too! IC's with pins that say "Xtal here" can't be trusted either!
The design below, for 1 MHz, is a good starting point for a discussion:
CMOS or HCMOS inverter |\ +--| >0---+----> OUT | |/ | | | +--\/\/\--+ | 1 Mohm | | | | \ | / 2.7 kohms | \ | / | | | 1MHz | parallel resonant +---||--+ _|_ _|_ 55pf ___ ___ 60pf _|_ _|_ \ / \ /
First of all, all crystals have two modes of resonance, the series and parallel resonances. These are closely spaced, and the circuit design must ensure that the resonance mode specified for the crystal is in operation, or you will end up with a frequency different from what is stamped on the crystal.
In the series mode, the crystal shows a low impedance at the resonant frequency. This impedance is on the order of 100 ohms to a few kohms. In the parallel mode, the crystal together with a specified capacitance in parallel, normally 30 pF, shows a high impedance at the resonant frequency. The 30 pF value is used regardless of the frequency.
All crystals have resonances at the odd harmonics, 3, 5, .. times the fundamental (overtones). At frequencies above 25 MHz, crystals are often made to operate at one of the harmonics. In all cases the external circuit must be made to suppress operation at the wrong harmonics or fundamental.
Normally the crystals are specified for the parallel resonance mode. The circuit above is designed for such a crystal. The crystal and the 30 pF parallel capacitor are here transformed into a pi filter network by dividing the 30 pF cap into two 60 pF caps and grounding the middle node. When one end is driven from a low impedance, this network has a 90 deg phase shift at the frequency of maximum gain. With a suitable driving impedance, the phase shift is brought close to 180 degrees. Thus the 2.7 kohm resistor. Other good reasons for it are that harmonics are damped by the resulting RC filter, and that the inverter output is removed from the strange load of the crystal network. A rule of thumb for determining the value of the output to crystal resistor is that it should have the same impedance as the capacitor at the operating frequency:
For a 32 kHz oscillator this resistor becomes 160 kohm.
The gain and 180 degrees phase shift of an inverter is now all that is needed to make this circuit oscillate at the right frequency with no twiddling necessary. The resistor between input and output is essential to put the gate in the range of linear operation so the necessary gain to start oscillation will be there. Since a CMOS inverter has very high input impedance, the value can be large. It is not critical, but a low value will increase power dissipation. Use 1000 times the series resistor if you have no other preferences. Note that the inverter *must*not* be a Schmitt trigger. Also note that one of the capacitors is adjusted to correct for the input capacitance of the inverter. In an actual circuit, corrections should also be made for other stray capacitances. The frequency is fine tuned by trimming the capacitors.
At higher frequencies account must be taken to the phase shift of the inverter. The phase shift for a gate when operated as a linear amplifier is certainly not to be found in any data sheet. Just note that 8 ns delay corresponds to 45 degrees phase lag at 16 MHz. Use this type of info as a starting point for adjustment by reducing the R & C:s.
An 4000 series CMOS inverter is usable up to around 5 MHz. Use HC to 25 MHz, AC to 40 MHz. Above that you are into F, ALS or AS families. The same principles apply, but the DC feedback must be arranged by a voltage divider, and the impedance is much lower, on the order of kohms.
To use a 3:rd or 5:th harmonic crystal, you need to insert a bandpass filter into the feedback to avoid oscillating at the fundamental or other harmonic. A series resonant LC filter is something that easily could be inserted between the output and the resistor in the above circuit. Zero degrees phase shift at the center frequency means that the other design criteria still hold. The Q of the filter should be low, around 1-3. Example for 30 MHz: (Just the filter.)
.47 uH 56 pF 180 ohms from inverter output-----(((((------| |---------\/\/\/-+- to xtal | _|_ ___ 56 pF | _|_ \ /
A C-L-C pi filter and series resonant crystal is another solution:
180 ohms .47uH from inverter output----\/\/\/--+---(((((----- xtal --+-- to input | series | _|_ _|_ ___ 120pF ___ 100pF | | _|_ _|_ \ / \ /
Component values should not be taken literally. (No indication of inverter type given!)
Some additional hints:
Don't distribute the inverter output node over a large PC board. Instead use free inverters of the same chip for buffering.
If you use the other inverters of the same chip for other signals, be aware that there is crosstalk that causes phase jitter in the oscillator output that might be disturbing in critical applications. For a clean noise-free output, a local voltage regulator to supply the inverter is also a good idea.
Also apply care in the PC board layout of the oscillator. Ground plane, good power decoupling, no signal wires routed under the crystal circuit.