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RE: [cosmacelf] Or/delay circuit- what i'll try

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  • bill rowe
    you re right lee. I was originally stuck on using the falling edge of n1 but all I really need is a delay. The shift register has been loaded on N2 s falling
    Message 1 of 3 , Jun 23, 2013
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      you're right lee.  I was originally stuck on using the falling edge of n1 but all I really need is a delay.

      The shift register has been loaded on N2's falling edge so it has what the latch has.  Now I'm shifting it out using N1.  I need the peripherals to see the rising edge of N1 to grab each bit before the shift register shifts the next bit in. Peripherals usually need <100 ns to grab the data so this should work.

      Thanks again.  I do have to do something similar for the incoming data and there i might need the more complete falling edge solution.


      To: cosmacelf@yahoogroups.com
      From: leeahart@...
      Date: Sun, 23 Jun 2013 12:21:59 -0500
      Subject: Re: [cosmacelf] Or/delay circuit- what i'll try

       
      On 6/23/2013 8:56 AM, bill rowe wrote:
      > I have two nor gates free so i'm going to try the following to delay
      It may work; I don't fully understand the needs of the circuit that this
      is driving. It will delay the rising and falling edges of N; but it
      won't give you the timing diagram you posted.

      Your earlier timing diagram showed the OUT pulse going high when the N
      pulse went *low*. I assume this was done because that's when the
      Membership Card's output port latches the output data.

      Your present circuit sets the OUT pulse high shortly after the N pulse
      goes *high*. That could occur before there is valid output data on the
      port. If the RC time constant is made as late as possible, so OUT goes
      high just barely before N goes low, then the high-time of the OUT pulse
      is just a tiny sliver, since the RC capacitor just barely reached the
      NOR gate's switching threshold.

      If you have only two spare NOR gates, you can replace the final two NOR
      gates in my earlier circuit with a diode OR gate, like this:

      ........................................................
      ............................______......................
      N___________________________\ NOR \ .. 1N4148 ..........
      .. | ......... _____......__|. D . O_____|\|_________OUT
      .. |_/\/\______\ NOR\ ...|. /_____/ .... |/| .. | ......
      ..... R1 . |___|. C .O---...................... | ......
      ......... _|_ ./____/ ........... AVR____|\|____| ......
      ...... C1 ___ .......................... |/| .. | ......
      .......... | ..........................1N4148 . > ......
      ......... gnd ................................. > 10k ..
      ............................................... > ......
      ............................................... | ......
      .............................................. gnd .....

      --
      Any intelligent fool can make things bigger, more complex, and more
      violent. It takes a touch of genius, and a lot of courage, to move
      in the opposite direction. -- Albert Einstein
      --
      Lee A. Hart, http://www.sunrise-ev.com/LeesEVs.htm

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