15083Re: [cosmacelf] RE: MC Rev G Ram Circuit
- Jun 7, 2014bill rowe bill_rowe_ottawa@... [cosmacelf] wrote:
>> There was only one circuit change in the memory section between rev.GOops, you're right. It was TPB, not TPA. Memory was only enabled during
>> and the earlier boards. Rev.B-F gated memory chip select with TPA, so
>> the RAM was only chip-selected while TPA was high.
> It was gated on TPB - right?
TPB, when the full 16-bit address was stable. That worked with memory
chips that latch the address when chip-select went low.
> I actually have an stk16c88 nonvolatile sram in the circuit at theI'm not familiar with that part. Maybe it's causing problems?
Normal static RAMs don't care what starts a memory cycle. Chip select
and output enable could be grounded for all they care, and the output
simply follows any changes in the address.
But there are many modern "fast" memory chips with special sequencing
requirements. The address might have to be stable when chip select goes
low, or output enable can't occur until after chip select is low, etc.
Maybe the STK16C88 has some special requirements like this?
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Then we get them in school and spend years squashing it out of them.
-- Geoffrey Orsak, Southern Methodist University dean of engineering
Lee Hart's EV projects are at http://www.sunrise-ev.com/LeesEVs.htm
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