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14519Generating a string of 8 pulses.

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  • bill rowe
    Nov 16, 2013
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      To speed up the SPI hardware I need to generate a series of 8 pulses on demand - immediately following the OUT 6 that loads the output shift register.  I have seen this kind of thing done with counters but I don't remember where.

      The CD4017 is a clocked decade counter with active high clear and clock inhibit.  It has outputs 'Q0' to 'Q9' depending on how many clocks it has seen since reset.

      In the circuit below the 4017 is clocked by the 1802 clock (run thru a schmitt trigger buffer).  On startup it will count thru its stages until Q8 comes high which is connected to its clock inhibit so it will stop counting.

      When the 1802 does an OUT 6, the combination N1*N2*NOT-NOT_MRD will come high and hold it in reset.  When the OUT 6 signal goes low again the 4017 will be free to clock 8 more times until Q8 comes high again and inhibits it.

      To get the actual SPI clock I need to gate the 1802 clock when Q8 is low and the OUT6 signal is low.  That's the only part that seems a bit tortured.

      I *think* this will work.  Maybe not fast enough to do two OUT 6's in a row but certainly with one intervening instruction which is fine: 50,000 bytes per second is nothing to sneeze at.  A faster clock would be fine for SPI but a free running clock would be likely to have a transition too close to the end of a reset pulse.

      If anybody has any observations or can point me to a similar setup I'd appreciate it.