RE: [beam] Hexapod
- The "gate delays" are not a problem since short h-bridge glitches have low
energy. Anyway the turnon / turnoff times of the h-bridge are also different
so only a deliberate deadtime can cure all glitches.
By the way, your original post with the 139 "reversing" Z-bridge idea was
quite brilliant. You almost got it right but because it does not tristate,
you have to use a resistor to isolate the HC139 output to the h-bridge input
. In other words, use 2 input resistors for each h-bridge input as shown in
the PNCfree microcore with "reversing" 74HC139 h-bridge. Note the nifty
control of the enable line.
There are several other variations on your hexapod circuit worth pursuing.
For example, your design uses a grounded master bicore and two slave
branches to generate a pair of waveforms each delayed from the master bicore
output waveforms by 90 degrees. These branches act as a slave bicore but
have independent delays and independent pulsewidths. However there is no
particular advantage to using branches compared to a slave bicore. In fact,
as you noted with branches you can get overlapping waveforms so then you
need a HC139 to avoid frying the h-bridge. Still independent control of the
slave wave could be useful.
So how about a bi-phase slave circuit similar to that Nv/Nu circuit used in
the powersmart head. It can be made phototropic with the addition of some
photodiodes just like a suspended master bicore as shown.
For a complete Hexapod circuit combine all these elements: the single ended
bi-phase slave output can be connected to the two halves of a HC139 and two
h-bridges each with independent reverse. This design gives you a complete
hexapod control circuit in TWO chips!
> -----Original Message-----
> From: Richard Piotter [SMTP:richfiles@...]
> Sent: Tuesday, September 26, 2000 7:50 PM
> To: BEAM
> Subject: Re: [beam] Hexapod
> Also, I have an aditional question. There is a slight, fraction of a
> second, delay between when an input enters an Nv and the output changes.
> With the two branches, there can be substancial delay, between loading
> and variations in component value. If I were to put an additional
> inverter at the end of one chain and cut the other, will the delay time
> of the second inverter switching after the first have an adverse effect
> on power coonsumption while the H-Bridge has the same signal for a split
> second (with no 139 installed). Is it a low enough effect to not
> adversely effect power consumption or the safety of the H-Bridges over
> an extended time?
> I think I'll do the PCB tommorow or the day after. Depends how bored I
> get and if I have enough dry transfers left for it.