## Re: [beam] Re: Suspended Bicore question

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• Hi WJG, [I can t believe I m actually answering a question about bicores! I hope I get it right] As I understand it, there are 2 cases: a.. Equal capacitors.
Message 1 of 11 , Nov 27, 2003
Hi WJG,

[I can't believe I'm actually answering a question about bicores! I hope I get it right]

As I understand it, there are 2 cases:
1. Equal capacitors.
2. Unequal capacitors, of which the 1-cap. is an extreme case.
In the equal caps case, both cap will charge at the same rate.

If at the beginning the voltage across the res. is Vcc then one cap will "want" to charge from 0 to Vcc, the other will "want" to charge from Vcc to 0 (negative charging).

[*] As you know, caps charge asymptotically and never actually reach the top voltage.

In the suspended bicore case, since both capacitors are connected and are charging at the same time and rate, the voltage difference (across the res.) is also getting smaller by the same amount times 2.

This means that cap. 1 will charge from 0V NOT to Vcc but to Vcc/2 and cap. 2 will charge from Vcc NOT to 0V but to Vcc/2 too!

But, since neither will ever reach Vcc/2 (from either side of Vcc) due to [*], an ideal inverter (one that switches at exactly Vcc) will never trigger (and the voltage across the res. is almost 0). UNLESS you add some noise.
Since the charge is always getting closer to Vcc, then any noise will at some point trigger one of the inverters. The stronger the noise (more motor load), the sooner the triggering (since it has to bridge a larger gap between the charge and Vcc/2).

Once one inverter is triggered the whole system reverses (I won't do into this part here) and the process starts again with inverted signals.

To summarize, equal capacitors generate a voltage across the res. that is always increasing towards 0V, this is exactly where sensitivity to noise is achieved.

In the unequal caps case, one cap (the smaller one) will charge BEFORE the other, thereby crossing the Vcc/2 threshold first and triggering the inverter and starting again.
There is nothing special about Vcc (to the cap.) in this scenario.

In this case, the voltage will have "theoretically" dropped to 0V across the res. at some different voltage value if the inverter wouldn't have triggered, or if the inverter trigger point would have been at another value.
But, since at Vcc/2 (in the cap.) the voltage across the res is NOT close to 0V, the system is not sensitive to noise.
This is basically a biased oscillator.

So, in fact, as Wilf explained, a 1-cap system is just an oscillator with a pretty predictable frequency and quite insensitive to noise.

In fact, the 2 cases are continuously connected.
The larger the cap value difference the less the system's sensitivity to noise. Note that this is not a linear relationship, I'm guessing it's exponential.

I hope what I wrote is accurate.
I also hope it's clear.
If it is indeed correct, than thank you for asking, since I think I understand it better now (especially the negative charging bit), if it isn't someone please correct me, and sorry for confusing you all.

Ref. The Suspended Bicore by Wouter Brok: http://www.beam-online.com/Bicore_article/bicore.htm

Are you saying that if there is one capacitor or two absolutely equal
capacitors, then the transition from on to off will be direct because
the capacitors reach a voltage over the trigger point? Likewise, with
two different capacitor values, the voltage will only reach slightly
above or below the trigger point. Then, small changes in the
capacitor's voltage will have a greater effect on the inverter
because it takes a less of a change in voltage to shift the capacitor
over the trigger point.

J Wolfgang Goerlich

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• ... Getting clearer all the time, Adi. Now to play with it a bit on the breadboard, measuring the voltages and watching for what you and Wilf have described.
Message 2 of 11 , Nov 28, 2003
> I also hope it's clear.

Getting clearer all the time, Adi. Now to play with it a bit on the
breadboard, measuring the voltages and watching for what you and Wilf
have described. Much appreciated.

J Wolfgang Goerlich
• If I could summarize this in one sentence: Assuming a CMOS input threshold of Vcc/2, then a bicore with equal capacitors will have two out of phase waveforms
Message 3 of 11 , Nov 28, 2003
If I could summarize this in one sentence:

Assuming a CMOS input threshold of Vcc/2,
then a bicore with equal capacitors will have two out of phase waveforms on
the input each of which is driven rapidly from Vcc/2 to 0V and Vcc and which
then decays asymptotically back to Vcc/2, giving a very long time constant.

One other way to look at this is the voltage waveform across the resistor
which changes rapidly from 0V to +Vcc or -Vcc and then the voltage on each
side drops exponentially towards 0V.

As the voltage gain of buffered CMOS is modest, even an ideal threshold of
Vcc is not one voltage but rather a band around Vcc/2.

Therefore the upper and lower switching thresholds sets the end points of
the decay and when the bicore is carefully balanced, the time constant can
be very long (>10RC).

In ideal bicores, the inputs are so sensitive to loading, that the 10M input
impedance of a scope probe with respect to ground will influence the
experiment. If a 100K resistor were used for the bicore R then the 10M probe
influence will be negligible but the frequency proportionally higher.

Alternately connect two scope probes one to each bicore input and connect
probe influence.

Alternately use the DMM input resistance (10M) in place of the bicore
resistor and read the voltage across the "resistor" directly on the dc volts
display.

Alternately use a cmos opamp as a unity gain buffer to monitor the bicore
waveforms. In fact, cmos opamps with the (+) inputs at Vcc/2 make ideal
inverters for bicore experiments.

Of all logic gates, metal gate CMOS has a switching threshold closest to
Vcc/2 and inverting buffers such as the CD4049, have high gain making these
devices good candidates for bicore tuning experiments.
Next are for symetrical input thresholds are 74AC240 inverters and most
unbalanced are 74HCT240 inverters.

Times up but I hope this description and tips on measurements shed some
light on the subject.

wilf

----- Original Message -----
From: "J Wolfgang Goerlich" <jwgoerlich@...>
To: <beam@yahoogroups.com>
Sent: Friday, November 28, 2003 4:59 AM
Subject: [beam] Re: Suspended Bicore question

> > I also hope it's clear.
>
> Getting clearer all the time, Adi. Now to play with it a bit on the
> breadboard, measuring the voltages and watching for what you and Wilf
> have described. Much appreciated.
>
> J Wolfgang Goerlich
>
>
>
>
>
> To unsubscribe from this group, send an email to:
> beam-unsubscribe@egroups.com
>
>
>
>
• oops! One other way to look at this is to observe the voltage waveform across the bicore resistor which switches rapidly from 0V to +Vcc or -Vcc and then the
Message 4 of 11 , Nov 28, 2003
oops!

One other way to look at this is to observe the voltage waveform across
the bicore resistor which switches rapidly from 0V to +Vcc or -Vcc and
then the voltage ON EACH SIDE drops exponentially towards Vcc/2
(not 0V) while the voltage ACROSS the resistor drops to 0V.
Near the end points of the decay, the wavform crosses the switching
threshold causing the bicore to change state and the cycle repeats.

wilf

----- Original Message -----
From: "Wilf Rigter" <wrigter@...>
To: <beam@yahoogroups.com>
Sent: Friday, November 28, 2003 6:31 AM
Subject: Re: [beam] Re: Suspended Bicore question

snipped

> One other way to look at this is the voltage waveform across the resistor
> which changes rapidly from 0V to +Vcc or -Vcc and then the voltage on each
> side drops exponentially towards 0V.

etc
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