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61251RE: Xilinx Neuron chip (was Re: [beam] Memristor)

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  • winglabs_inc
    Dec 27, 2013
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      Right. If any single neuron or ganglion on neurons was to coordinate a global decay pulse, the latency of that neuron/ganglion would be completely user dependent. I would like to note, though, that if the processor is fully connected, then each neuron is capable of outputting to its own decay input, and so neurons with fixed conditions are easy to implement. Also, individual sub-networks could internally regulate their own decay rate, using an independent integration neuron and decay neuron/ganglion.
      Also, I've noticed some architectural similarities between my neural computer and a TTA URISC(OISC) processor.
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