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Single-Step, Status Lights and Examine

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  • deramp5113
    Based on the schematic for the display/control board of the original Altair 8800, and the Theory of Operation Manual, the 8800 single-steps one machine cycle
    Message 1 of 3 , Dec 1, 2012
      Based on the schematic for the display/control board of the original Altair 8800, and the Theory of Operation Manual, the 8800 single-steps one machine cycle (memory cycle) per switch activation.

      To sequence through a three byte instruction (e.g., JMP 0x1200) takes three single-steps. Each memory cycle, in turn, may generate different status light combinations based on the type of memory cycle. For example, the M1 light is lit only when an instruction opcode is being fetched. This operation can be seen in two different parts of this video on YouTube: http://www.youtube.com/watch?v=DeebaLGlDMo.

      However, watching the popular Altair 8800 Demonstration video on YouTube from BigDon163 (http://www.youtube.com/watch?v=vAhp_LzvSWk), the status lights do not change while single-stepping through code. The status lights remain lit with the instruction fetch combination of LEDs the entire time he is single-stepping.

      At first, I figured the display/control board must have been modified to single step in full instruction increments instead of machine cycle increments. However, after watching the video carefully in slow motion, the address lights are clearly advancing just one byte each time the single-step switch is activated (i.e., we're single stepping in machine cycles, not complete instructions). I know there are multi-byte instructions within the code that was stepped through. Anyone familiar with what might be going on in this video?

      Which brings me to my real question: Let's say we single step once starting at a LDA instruction (a 3 byte instruction). The PC is now one byte past the LDA opcode and is pointing at the LSB of the two byte address sequence for the LDA. The M1 light is off because the 8080 is past the opcode fetch. Now, press the examine button on the 8080. This injects a JMP opcode followed by two address bytes (based on the front panel switches) into the 8080 for the next three machine cycles. However, the 8080 is not in the M1 cycle and therefore, is not looking for an opcode. It will treat the injected JMP opcode as the 1st address byte for the LDA instruction. Similarly, the 1st address byte of the injected JMP sequence will be interpreted by the 8080 as the 2nd address byte of the LDA effective address. At this point, the 8080 thinks the LDA instruction is complete and is back to cycle M1 (opcode fetch). This means the 2nd address byte of the injected JMP sequence will be interpreted as the next opcode to execute by the 8080. Obviously, in this example, the examine function will not work as expected. So my question is, does this really happen? If not, what am I reading wrong on the schematics?

      Any input from owners of real equipment who know the answer or can do some experiments is appreciated!
    • mfeberhard
      Intriguing question! So I have fired up my Altair and am trying this out. I deposited this simple program (octal): 0000: 303 JMP 0001: 000 0 0002: 000
      Message 2 of 3 , Dec 3, 2012
        Intriguing question!

        So I have fired up my Altair and am trying this out. I deposited this simple program (octal):

        0000: 303 JMP
        0001: 000 0
        0002: 000 0


        Now, examine 0000, and see 303, with M1 lit.

        Single-step once, and see 000, with M1 no longer lit.

        Now, I hit Examine, and it strangely takes me to address 304, showing data of 000, and the M1 light lit.

        Note that a second hit on the Examine switch brought things back -the data and address make sense.

        So yes, you are correct. The Examine instruction will do a weird thing when not on an M1 cycle - though a second hit on the Examine switch seems to do the right thing.


        I had to check, because I have had the instinct to hit Stop and Reset before using Examine, or just hit the Examine switch twice if the address makes no sense. I must have learned this behavior in 1976, and forgot not only why I did it, but even that I was doing it - my fingertips would do this naturally...

        Best,
        Martin



        --- In altaircomputerclub@yahoogroups.com, "deramp5113" <deramp5113@...> wrote:
        >
        > Based on the schematic for the display/control board of the original Altair 8800, and the Theory of Operation Manual, the 8800 single-steps one machine cycle (memory cycle) per switch activation.
        >
        > To sequence through a three byte instruction (e.g., JMP 0x1200) takes three single-steps. Each memory cycle, in turn, may generate different status light combinations based on the type of memory cycle. For example, the M1 light is lit only when an instruction opcode is being fetched. This operation can be seen in two different parts of this video on YouTube: http://www.youtube.com/watch?v=DeebaLGlDMo.
        >
        > However, watching the popular Altair 8800 Demonstration video on YouTube from BigDon163 (http://www.youtube.com/watch?v=vAhp_LzvSWk), the status lights do not change while single-stepping through code. The status lights remain lit with the instruction fetch combination of LEDs the entire time he is single-stepping.
        >
        > At first, I figured the display/control board must have been modified to single step in full instruction increments instead of machine cycle increments. However, after watching the video carefully in slow motion, the address lights are clearly advancing just one byte each time the single-step switch is activated (i.e., we're single stepping in machine cycles, not complete instructions). I know there are multi-byte instructions within the code that was stepped through. Anyone familiar with what might be going on in this video?
        >
        > Which brings me to my real question: Let's say we single step once starting at a LDA instruction (a 3 byte instruction). The PC is now one byte past the LDA opcode and is pointing at the LSB of the two byte address sequence for the LDA. The M1 light is off because the 8080 is past the opcode fetch. Now, press the examine button on the 8080. This injects a JMP opcode followed by two address bytes (based on the front panel switches) into the 8080 for the next three machine cycles. However, the 8080 is not in the M1 cycle and therefore, is not looking for an opcode. It will treat the injected JMP opcode as the 1st address byte for the LDA instruction. Similarly, the 1st address byte of the injected JMP sequence will be interpreted by the 8080 as the 2nd address byte of the LDA effective address. At this point, the 8080 thinks the LDA instruction is complete and is back to cycle M1 (opcode fetch). This means the 2nd address byte of the injected JMP sequence will be interpreted as the next opcode to execute by the 8080. Obviously, in this example, the examine function will not work as expected. So my question is, does this really happen? If not, what am I reading wrong on the schematics?
        >
        > Any input from owners of real equipment who know the answer or can do some experiments is appreciated!
        >
      • deramp5113
        Exactly what I needed - thanks! Your result makes perfect sense. When the examine button is pressed, the original JMP instruction at address 000 treats the
        Message 3 of 3 , Dec 3, 2012
          Exactly what I needed - thanks!

          Your result makes perfect sense. When the examine button is pressed, the original JMP instruction at address 000 treats the injected JMP opcode (303) as the lsb of the original JMP. The next byte injected is the LSB of the address switches (000 in this case), which provides a complete address for the original JMP instruction of 303. So the CPU PC is now 303 and the CPU starts a new instruction fetch. However, the examine inject logic still has one more byte to inject into the CPU - another 000 for the msb of the address switches. The 8080 is fetching an opcode at this point, so it interprets the 000 as a NOP and steps the PC to 304 at which point the examine inject logic stops the 8080 and the front panel address lights show the PC of 304 as expected!

          That helps me greatly with what I'm working on. Thanks!

          Mike




          --- In altaircomputerclub@yahoogroups.com, "mfeberhard" <eberhard@...> wrote:
          >
          > Intriguing question!
          >
          > So I have fired up my Altair and am trying this out. I deposited this simple program (octal):
          >
          > 0000: 303 JMP
          > 0001: 000 0
          > 0002: 000 0
          >
          >
          > Now, examine 0000, and see 303, with M1 lit.
          >
          > Single-step once, and see 000, with M1 no longer lit.
          >
          > Now, I hit Examine, and it strangely takes me to address 304, showing data of 000, and the M1 light lit.
          >
          > Note that a second hit on the Examine switch brought things back -the data and address make sense.
          >
          > So yes, you are correct. The Examine instruction will do a weird thing when not on an M1 cycle - though a second hit on the Examine switch seems to do the right thing.
          >
          >
          > I had to check, because I have had the instinct to hit Stop and Reset before using Examine, or just hit the Examine switch twice if the address makes no sense. I must have learned this behavior in 1976, and forgot not only why I did it, but even that I was doing it - my fingertips would do this naturally...
          >
          > Best,
          > Martin
          >
          >
          >
          > --- In altaircomputerclub@yahoogroups.com, "deramp5113" <deramp5113@> wrote:
          > >
          > > Based on the schematic for the display/control board of the original Altair 8800, and the Theory of Operation Manual, the 8800 single-steps one machine cycle (memory cycle) per switch activation.
          > >
          > > To sequence through a three byte instruction (e.g., JMP 0x1200) takes three single-steps. Each memory cycle, in turn, may generate different status light combinations based on the type of memory cycle. For example, the M1 light is lit only when an instruction opcode is being fetched. This operation can be seen in two different parts of this video on YouTube: http://www.youtube.com/watch?v=DeebaLGlDMo.
          > >
          > > However, watching the popular Altair 8800 Demonstration video on YouTube from BigDon163 (http://www.youtube.com/watch?v=vAhp_LzvSWk), the status lights do not change while single-stepping through code. The status lights remain lit with the instruction fetch combination of LEDs the entire time he is single-stepping.
          > >
          > > At first, I figured the display/control board must have been modified to single step in full instruction increments instead of machine cycle increments. However, after watching the video carefully in slow motion, the address lights are clearly advancing just one byte each time the single-step switch is activated (i.e., we're single stepping in machine cycles, not complete instructions). I know there are multi-byte instructions within the code that was stepped through. Anyone familiar with what might be going on in this video?
          > >
          > > Which brings me to my real question: Let's say we single step once starting at a LDA instruction (a 3 byte instruction). The PC is now one byte past the LDA opcode and is pointing at the LSB of the two byte address sequence for the LDA. The M1 light is off because the 8080 is past the opcode fetch. Now, press the examine button on the 8080. This injects a JMP opcode followed by two address bytes (based on the front panel switches) into the 8080 for the next three machine cycles. However, the 8080 is not in the M1 cycle and therefore, is not looking for an opcode. It will treat the injected JMP opcode as the 1st address byte for the LDA instruction. Similarly, the 1st address byte of the injected JMP sequence will be interpreted by the 8080 as the 2nd address byte of the LDA effective address. At this point, the 8080 thinks the LDA instruction is complete and is back to cycle M1 (opcode fetch). This means the 2nd address byte of the injected JMP sequence will be interpreted as the next opcode to execute by the 8080. Obviously, in this example, the examine function will not work as expected. So my question is, does this really happen? If not, what am I reading wrong on the schematics?
          > >
          > > Any input from owners of real equipment who know the answer or can do some experiments is appreciated!
          > >
          >
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