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TRADE: IMS Z80 S-100 CPU board for 8080/8085 board

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  • Systems Glitch
    (cross-posted to VC Forums and MARCH listserv) I ve got a fully working IMS 451 Z80 CPU board for the S-100 bus that I d like to trade:
    Message 1 of 14 , Aug 15, 2012
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      (cross-posted to VC Forums and MARCH listserv)

      I've got a fully working IMS 451 Z80 CPU board for the S-100 bus that I'd like to trade:

      http://www.glitchwrks.com/temp/ims-451.jpg

      The manual is available from s100computers.com:

      http://www.s100computers.com/Hardware%20Folder/IMS/Z80-451%20Board/Z80-740%20Board.htm

      Mine is 100% tested and functional. It even has the correct header to work as-is with the IMSAI front panel (I was using it as my CPU card in my IMSAI). It's a good implementation of the S-100 "Altair" standard; that is, it isn't IEEE-696 compatible. It can be jumpered for 2 or 4 MHz operation, 0,1,2 wait states, and power-on-jump. It can also provide MWRITE in the event that it's being used in a system without a front panel. I'm only looking to trade it because it doesn't work well with the Solid State Music PB-1 EPROM burner I use with the IMSAI -- no fault of its own, the PB-1 has very touchy wait state timing (writing PROMs works OK with my Cromemco ZPU, but read wait states won't work with either).

      I'm looking to trade it for an 8080 or 8085 based CPU board, or possibly another Cromemco ZPU. The trade DOES NOT have to be in working condition! The board needs to have a front panel header -- I'd prefer an IMSAI-compatible header, but I'll adapt if necessary.

      Thanks,
      Jonathan
    • D. Hugh Redelmeier
      ... Don t think of this as memory, think of it as disk. If you look, for example, at John Crane s card, you can see that the way the Altair program gets at the
      Message 2 of 14 , Aug 15, 2012
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        | From: cyberquipment <rjones@...>

        | With the adress buss limited, how would you address that much mem? some
        | kind of pageing? Perhaps address a block at a time? Hmmmmm.

        Don't think of this as memory, think of it as disk.

        If you look, for example, at John Crane's card, you can see that the way
        the Altair program gets at the flash ram chip is to use three OUT
        instructions to load the three bytes of the address address onto the board
        and then do a IN or OUT instruction to actually fetch or store a byte.

        I cannot make out which flash chip John used. It might be this one:
        <http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en549494>

        I don't know if a simple write of a byte works. After all, flash likes to
        erase by block. So I don't quite know the protocol John uses for
        "programming" (writing) to the flash.
      • D. Hugh Redelmeier
        ... Well, it was way-too-ambitious. But I did learn plenty, so it was fun and worthwhile. The upverter.com tool is very young -- not even announced, I guess.
        Message 3 of 14 , Aug 16, 2012
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          | From: D. Hugh Redelmeier <hugh@...>
          |
          | As a way-too-ambitious project, I want to design an S100 board to make an
          | SDHC flash memory card available to my Altair.

          Well, it was way-too-ambitious. But I did learn plenty, so it was fun
          and worthwhile.

          The upverter.com tool is very young -- not even announced, I guess.
          It is missing a few features that I needed and it has a few bugs that
          I hit. But the creators were there, taking notes, and fixing bugs
          quite quickly.

          | I've found some useful examples here
          | <http://s100computers.com/My%20System%20Pages/IDE%20Board/My%20IDE%20Card.htm>

          This seems like a fine design. It supports Compact Flash (and IDE),
          rather than SD, but that is probably a plus.

          It does seem to have bells and whistles. A fair bit of the cost and
          perhaps power budget goes into LEDs.

          Apparently if enough people ask, a new run of boards will be produced.

          John Crane's design is simpler.
        • Agustus Finknottle IV "Gussy"
          Hi Hugh, Yes it was the SST chip. 512K by 8bits. Since I planned on using it more as a ROM to load sample programs from a library , the 100K cycle max wasn t
          Message 4 of 14 , Aug 16, 2012
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            Hi Hugh,

            Yes it was the SST chip. 512K by 8bits. Since I planned on using it more as a ROM to load sample programs from a "library", the 100K cycle max wasn't a problem. But I did want permanence, so I liked the 100 year retention.

            It did require several "passes" to write or clear the chip. Like programming an EPROM, but faster. The timing was also an issue. I didn't get around to determining the cpu type/speed, so the code runs exra slow on the 8080, as the faster Z80 still had to perform the write for the minimum amount of time. It's a physics issue. I'll upload some of the low-level code I used so you can take a look.

            -John
          • Systems Glitch
            Hi group, I ve been following the help designing S100 board thread. I ve designed and built several boards for my S-100 boxes (no Altair of my own, tho I do
            Message 5 of 14 , Aug 16, 2012
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              Hi group,

              I've been following the "help designing S100 board" thread. I've designed and built several boards for my S-100 boxes (no Altair of my own, tho I do now have an IMSAI). One of the boards I've put together is a nonvolatile RAM board based on RAMTRON Ferroeletric RAM (FeRAM). This is modern technology, but it's essentially core on silicon (it's even destructive write!). RAMTRON's onboard controller handles all of the timing and write-after-read stuff, so you interface it just like a normal SRAM.

              The benefits over Flash are rewrite limits in the trillions of rewrites, byte-writable (no block erase/write), single pass write (literally DEPOSIT from the front panel is sufficient), and it comes in a JEDEC package. It's really handy when you're doing assembly or machine code development on these old boxes.

              If anyone is interested in pursuing the idea further, I'd be glad to make plans available, or put a board together. My current board is wire wrap, so not easily duplicated...plus it adds some functionality that wouldn't be necessary for a memory-only board. 32K of FeRAM from Mouser is under $10 and occupies a single surface-mount 28 pin package.

              Thanks,
              Jonathan
            • Jack Rubin
              I m definitely interested! How about an Omnibus version for the PDP-8? Jack ________________________________ From: Systems Glitch
              Message 6 of 14 , Aug 16, 2012
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                I'm definitely interested! How about an Omnibus version for the PDP-8?
                Jack


                From: Systems Glitch <systems.glitch@...>
                To: altaircomputerclub@yahoogroups.com
                Sent: Thu, August 16, 2012 2:07:10 PM
                Subject: [Altair Computer Club] NVRAM S-100 board, WAS: help designing S100 board

                Hi group,

                I've been following the "help designing S100 board" thread. I've designed and built several boards for my S-100 boxes (no Altair of my own, tho I do now have an IMSAI). One of the boards I've put together is a  nonvolatile RAM board based on RAMTRON Ferroeletric RAM (FeRAM). This is modern technology, but it's essentially core on silicon (it's even destructive write!). RAMTRON's onboard controller handles all of the timing and write-after-read stuff, so you interface it just like a normal SRAM.

                The benefits over Flash are rewrite limits in the trillions of rewrites, byte-writable (no block erase/write), single pass write (literally DEPOSIT from the front panel is sufficient), and it comes in a JEDEC package. It's really handy when you're doing assembly or machine code development on these old boxes.

                If anyone is interested in pursuing the idea further, I'd be glad to make plans available, or put a board together. My current board is wire wrap, so not easily duplicated...plus it adds some functionality that wouldn't be necessary for a memory-only board. 32K of FeRAM from Mouser is under $10 and occupies a single surface-mount 28 pin package.

                Thanks,
                Jonathan


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              • Craig Landrum
                ... Hugh; Board address is different than the flash address. The board address is what you use with 8080/Z-80 I/O statements to talk the on-board registers
                Message 7 of 14 , Aug 20, 2012
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                  On 8/16/12 at 9:20 PM, rjones@... (cyberquipment) wrote:

                  >
                  >--- In altaircomputerclub@yahoogroups.com, Craig Landrum <craigl@...> wrote:
                  >>
                  >>>As a way-too-ambitious project, I want to design an S100
                  >>>board to make an SDHC flash memory card available to my Altair.
                  >>>
                  >>>Any hints you guys can share with a hardware newbie?
                  >>
                  >>Hugh;
                  >>
                  >>What a great project. I would actually buy one if you manage
                  >>to do it.
                  >>Some suggestions that I'm sure you have thought of:
                  >>
                  >>- Put an 8 pos DIP switch in there to allow the board address to be
                  >>configurable.
                  >>
                  >>- Put the flash card socket/holder external to the board so
                  >>that we can
                  >>run a ribbon cable out of the cabinet, allowing us to easily change
                  >>cards.
                  >>--
                  >>Craig Landrum
                  >>Chief Technical Officer
                  >>mindwrap, inc.
                  >>Phone: (540) 347-2552 x 229
                  >>Fax: (540) 347-2556
                  >>email: craigl@...
                  >>
                  >With the adress buss limited, how would you address that much
                  >mem? some kind of pageing? Perhaps address a block at a time? Hmmmmm.
                  >

                  Hugh;

                  Board address is different than the flash address. The board
                  address is
                  what you use with 8080/Z-80 I/O statements to talk the on-board registers
                  that are used to perform whatever functions the board performs.
                  For example,
                  a serial board address might be 20H and 21H to talk to a configuration
                  register to set a baud rate and a data register to send and receive
                  data bytes.

                  I would assume that a flash board would have a base I/O address
                  of some
                  type (say 80H), with other on board addresses based off the base address.
                  Off the top of my head, this might be:

                  80H - Configuration register, set or clear control bits for read
                  or write
                  81H - Byte I/O - read or write a byte for a block/sector
                  82H - Low (LSB) byte of target block of flash mem
                  83H - Mid byte of target block of flash mem
                  84H - High (MSB) of target block of flash mem

                  Operation would consist of setting config bits to
                  reset/read/write, then
                  set the target sector/block address, then read or write bytes
                  via the
                  data register to read or write a block-size chunk of data.

                  The above board registers are accessed using 8080/Z-80 I/O
                  statements such
                  as OUT (80H),A or IN A,(80H) for Z-80. All S-100 boards
                  used this
                  same scheme. Only actual memory boards respond to memory access
                  instructions such as LD (HL),A to deposit a byte to the memory address
                  pointed to by the HL register pair or other similar instruction.
                  Of course
                  program execution generates memory read cycles also.

                  In any case, that DIP switch I mentioned was for setting the
                  base I/O
                  address for the board and was a common way for S-100 boards
                  designers to
                  make their boards configurable allow users/buyers to assign it
                  an I/O
                  address that did not conflict with their existing systems.



                  --
                  Craig Landrum
                  Chief Technical Officer
                  mindwrap, inc.
                  Phone: (540) 347-2552 x 229
                  Fax: (540) 347-2556
                  email: craigl@...
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