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Re: [Altair Computer Club] Example Altair 680 Troubleshooting

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  • Grant Stockly
    ... That is one thing that wasn t quite straight forward. Once the 6800 gets an invalid opcode all bets are off on what happens next. The reset and halt
    Message 1 of 9 , May 26, 2007
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      At 07:06 PM 5/26/2007, you wrote:


      >good job
      >There is usually a systematic approach in troubleshooting systems.
      >You certainly followed a logical approach.
      >Given a few known good conditions(eg. power, reset, etc),
      >you can skip a few steps and it helps to have sockets too :)
      >Also LEDs never fail to offer clues.

      That is one thing that wasn't quite straight forward. Once the 6800 gets
      an invalid opcode all bets are off on what happens next. The reset and
      halt inputs to the 6800 didn't seem to do anything at times!!! I was
      watching the halt line while watching the data lines... Nothing! Because
      B2 was stuck low it was getting invalid opcodes I guess. The MITS
      documentation has a "fix" for the front panel board that will allow it to
      reset the 680 if it gets an invalid opcide. It involves cutting one trace
      on the back (non switch side) and two on the front. The addition of a
      10ohm resistor and a .1u cap. I'm not sure of the details yet...

      I was very lucky to have both the 680 Turnkey and "regular" front
      panels. The turnkey is worthless for troubleshooting.

      I'm troubleshooting another 680 right now, but it seems to be VERY
      sick. I'm going to hook up the scope and check the 2 phase clock... Its a
      digital storage scope so I will upload the results...

      Grant
    • jack99rubin
      ... diagnose these ... that I ... Since this is such an important topic, let me replay it and ask for clarification in a few places where I lost you in the
      Message 2 of 9 , May 27, 2007
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        --- In altaircomputerclub@yahoogroups.com, Grant Stockly <grant@...>
        wrote:
        >
        > I don't really know the correct way, or if there is one, to
        diagnose these
        > old computers but I have been lucky with the last few Altair boards
        that I
        > copied.

        Since this is such an important topic, let me replay it and ask for
        clarification in a few places where I lost you in the narrative - I'm
        just a solder-monkey hoping to advance to tech!

        First, let me make sure I understand the problem based on symptoms
        seen - A5 and D2 are "stuck low" and you get no monitor prompt. So
        you've already verified internal power levels and distribution. Do
        you know A5 and D2 are low based on the front panel - you can't get
        the LEDs to light? Or are you already actually scoping (with logic
        analyer?) the address and data lines? Are you attaching your leads at
        the CPU or at the front panel?


        > I'm going to write this message as I do it so I don't forget
        anything or
        > the order. : )
        >
        > I first removed the 1702 ACIA EPROM to see if it was the cause. It
        isn't. : (
        >
        > I'm going to remove the 6850 now. Nope. : (

        ... and since it is really one of several I/O options, not necessary
        for operation with the front panel? Was this the logic in removing
        the ACIA prom as well?

        >
        > I'm going to REPLACE the 6800 now. Nope. : (

        did you mean to say you replaced the 6850, or did you remove the 6800
        prior to starting the process (step zero?)?

        >
        > I just noticed that A5 lights up the Altair is NOT halted. D2
        (BD2)never
        > lights.

        OK, so something changed here? A5 was not lighting before but now
        does, while D2 remains low? If so, was that because the 6800 was
        replaced while the 6850 remained out?


        >
        > The scope shows BD2 is pretty hard to ground. A continuity meter
        says 15
        > ohms. Maybe a buffer or memory chip is to blame. When trying to
        deposit
        > with the front panel there is "data" on the line that only comes up
        to 1v
        > or so.

        This is really interesting - "pretty hard" sounds very "analog" - I'd
        been thinking that a line is either high or low - seeing a voltage in
        the "undefined" range would be unexpected - is this a common? I don't
        think this would even trigger a LED-based logic probe.


        > RP3 ties some lines including BD2 to ground, so I removed it.
        Nope. : (

        I'm following along on the schematic here - RP3 is a 4.7K resistor
        pack connected to Vcc - so wouldn't it be pulling lines high?

        >
        > BD2 goes to IC WW next. Removed it, short is gone!

        OK, so I may be really anal here but I'm trying to fully grok this -
        when did you move from D2 to BD2? D2 also goes through one of the
        resistor packs - did you remove them all? Is an IC more likely to
        fail than the resistor pack or does it make sense to follow the path
        of least resistance (hahaha) by removing socketed ICs instead of
        soldered resistor packs?

        > when desoldered on the IC from pin 8 (GND) to 6 (BD2) shows 13.5
        ohms
        > resistance. : )

        WW is a 74367 hex bus driver - so out of the circuit, all pins should
        be isolated from each other, while in circuit, pin 6 and 7 will
        either be open or connected based on the state of pin 1? There should
        _never_ be a low impedance pathway between Vcc (pin 16), GND (pin 8)
        and any other pins, right? With a "regular" multimeter in continuity
        mode will 13.5 ohms show as open or closed?

        >
        > Forgot to resolder RP3 before checking it.
        >
        > BD2 can now be deposited. All ram chips check out (walking 1s
        test).
        >
        > Removing board to install RP3, 6850, and ACIA.
        >
        > Crossing my fingers... ; )

        I can do this!

        >
        > WOOHOO!!! :
        >

        and I look forward to doing that!

        Thanks for your generosity and patience in sharing your work! I'll be
        bringing my 680b to VCF next month - hope to exchange notes with Bill
        Degnan. Will you be there too or is that just an urban myth?

        best,
        Jack
      • Dan
        Yea, I noticed that weirdness in the Reset and Halt circuit. Basically it s wired in synchronous mode (versus the proper method which should be asynchronous).
        Message 3 of 9 , May 27, 2007
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          Yea, I noticed that weirdness in the Reset and Halt circuit.
          Basically it's wired in synchronous mode (versus the proper method which
          should be asynchronous).
          That mod from MITS that you mentioned is just a basic method of wiring
          the reset line.
          I also have the reset modified on mine from back then.

          It a creates an RC time constant together with the resistor and cap.
          When the switch is pressed it will shunt the cap to ground forcing the
          reset signal to Lo.
          The time constant begins when the switch is released and then the cap
          begins to chargeup.
          Then the reset input of the cpu will remain Lo (due to the rise time)
          for a certain amount of clock cycles to allow it to propagate throughout
          the entire chip. --There is a minimum time period required, about 20
          cycles I think. Also when the system is first turned on, to allow the
          power supply to settle.

          I always design any microprocessor with a minimum of this circuit, then
          there's additional reset features that can be added to this.

          =Dan

          [ My Corner of Cyberspace http://ragooman.home.comcast.net/ ]



          Grant Stockly wrote:
          >
          > At 07:06 PM 5/26/2007, you wrote:
          >
          > >good job
          > >There is usually a systematic approach in troubleshooting systems.
          > >You certainly followed a logical approach.
          > >Given a few known good conditions(eg. power, reset, etc),
          > >you can skip a few steps and it helps to have sockets too :)
          > >Also LEDs never fail to offer clues.
          >
          > That is one thing that wasn't quite straight forward. Once the 6800 gets
          > an invalid opcode all bets are off on what happens next. The reset and
          > halt inputs to the 6800 didn't seem to do anything at times!!! I was
          > watching the halt line while watching the data lines... Nothing! Because
          > B2 was stuck low it was getting invalid opcodes I guess. The MITS
          > documentation has a "fix" for the front panel board that will allow it to
          > reset the 680 if it gets an invalid opcide. It involves cutting one trace
          > on the back (non switch side) and two on the front. The addition of a
          > 10ohm resistor and a .1u cap. I'm not sure of the details yet...
          >
          > I was very lucky to have both the 680 Turnkey and "regular" front
          > panels. The turnkey is worthless for troubleshooting.
          >
          > I'm troubleshooting another 680 right now, but it seems to be VERY
          > sick. I'm going to hook up the scope and check the 2 phase clock... Its a
          > digital storage scope so I will upload the results...
          >
          > Grant
          >
          >
          > ------------------------------------------------------------------------
          >
          > No virus found in this incoming message.
          > Checked by AVG Free Edition.
          > Version: 7.5.472 / Virus Database: 269.8.0/819 - Release Date: 5/26/2007 10:47 AM
          >
        • Grant Stockly
          ... I did both. There are actually two D2 s in the Altair. One for the processor and another called BD2 , the buffered one. I used the front panel to
          Message 4 of 9 , May 27, 2007
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            >First, let me make sure I understand the problem based on symptoms
            >seen - A5 and D2 are "stuck low" and you get no monitor prompt. So
            >you've already verified internal power levels and distribution. Do
            >you know A5 and D2 are low based on the front panel - you can't get
            >the LEDs to light? Or are you already actually scoping (with logic
            >analyer?) the address and data lines? Are you attaching your leads at
            >the CPU or at the front panel?

            I did both. There are actually two "D2"s in the Altair. One for the
            processor and another called "BD2", the buffered one. I used the front
            panel to quickly narrow in on what the problem was and then investigate it
            with the scope.

            >... and since it is really one of several I/O options, not necessary
            >for operation with the front panel? Was this the logic in removing
            >the ACIA prom as well?

            Yes, the front panel in the 680 needs no memory or I/O devices installed to
            work. If there is not at least RAM or ROM then you can't actually examine
            anything, it would be all FF.

            The 6850 itself couldn't cause the address lines (other than A0) to go bad
            because they all go through some LS04s and LS30s first. But it does
            connect to the buffered data bus.

            > > I'm going to REPLACE the 6800 now. Nope. : (
            >did you mean to say you replaced the 6850, or did you remove the 6800
            >prior to starting the process (step zero?)?

            I replaced the 6800 with a new one. I left the 6850 out. I don't think
            the front panel will work without a processor. I'll try........ Nope.

            > > I just noticed that A5 lights up the Altair is NOT halted. D2
            >(BD2)never lights.
            >OK, so something changed here? A5 was not lighting before but now
            >does, while D2 remains low? If so, was that because the 6800 was
            >replaced while the 6850 remained out?

            Nope. This was a weird one. A5 would not light up doing an examine while
            halted but when I flipped the run switch it would glow. D2 would
            NEVER. So I decided to focus on D2 first and then figure out why A5 was
            acting up. : )

            > > The scope shows BD2 is pretty hard to ground. A continuity meter
            >says 15 ohms

            >This is really interesting - "pretty hard" sounds very "analog" - I'd
            >been thinking that a line is either high or low - seeing a voltage in
            >the "undefined" range would be unexpected - is this a common? I don't
            >think this would even trigger a LED-based logic probe.

            Well, the prohlem was kind of analog. It wasn't grounded in the sense that
            it was bridged or connected directly to ground. The buffers on the front
            panel were strong enough to create a little 1v or so blip for depositing to
            BD2, but thats it (the blim was on the input to the buffer, the buffer was
            not buffering). The other data lines make it up to 4.5-5v during a
            deposit. The short inside the 74367 was later measured at 15ohms in
            circuit, and 13.5 ohms out of circuit. That is what I meant by "pretty hard".

            > > RP3 ties some lines including BD2 to ground, so I removed it.
            >Nope. : (
            >
            >I'm following along on the schematic here - RP3 is a 4.7K resistor
            >pack connected to Vcc - so wouldn't it be pulling lines high?

            Yep...brain fart...but I have a nice desoldering pump so it only takes me
            30 seconds to pop an IC off with no damage. : ) The resistor pack wasn't
            a big deal. I can't even tell it was ever off.

            > > BD2 goes to IC WW next. Removed it, short is gone!
            >
            >OK, so I may be really anal here but I'm trying to fully grok this -
            >when did you move from D2 to BD2? D2 also goes through one of the
            >resistor packs - did you remove them all? Is an IC more likely to
            >fail than the resistor pack or does it make sense to follow the path
            >of least resistance (hahaha) by removing socketed ICs instead of
            >soldered resistor packs?

            D2 as shown on the front panel, BD2 on the buss. I thought I had edited
            the e-mail to say D2 as written on the front panel and BD2 on the bus. D2
            was also getting shorted because of the bad buffer, but from the scope I
            could tell that it was BD2. I guess I didn't write everything I did. : (


            > > when desoldered on the IC from pin 8 (GND) to 6 (BD2) shows 13.5
            >ohms
            > > resistance. : )
            >
            >WW is a 74367 hex bus driver - so out of the circuit, all pins should
            >be isolated from each other, while in circuit, pin 6 and 7 will
            >either be open or connected based on the state of pin 1? There should
            >_never_ be a low impedance pathway between Vcc (pin 16), GND (pin 8)
            >and any other pins, right? With a "regular" multimeter in continuity
            >mode will 13.5 ohms show as open or closed?

            All of the other pins measured as you would think. The Fluke 111 that I
            have does pass voltage to measure resistance, but in this case it was only
            6 and 8 that were shorted together. I just tested the chip again and it
            measured 13.7 ohms with the positive lead on 8 and negative on 6 AND with
            the leads switched around. I don't know if that means something important
            or not. Maybe it means that its not a silicon short.

            >Thanks for your generosity and patience in sharing your work! I'll be
            >bringing my 680b to VCF next month - hope to exchange notes with Bill
            >Degnan. Will you be there too or is that just an urban myth?

            Yep. : )

            Grant
          • Derek J. Lassen
            I can t remember the opcode, but there was a 6800 instruction that I gave the mnemonic HCF for halt and catch fire. Motorola didn t document it. If executed,
            Message 5 of 9 , May 27, 2007
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              I can't remember the opcode, but there was a 6800 instruction that I gave the mnemonic "HCF" for halt and catch fire. Motorola didn't document it. If executed, and if power wasn't dropped within a few seconds (20 -30 ?), The processor would turn into a 16 bit down counter forever more.

              (s) Derek

              At 08:07 PM 5/26/2007 -0800, you wrote:

              At 07:06 PM 5/26/2007, you wrote:

              >good job
              >There is usually a systematic approach in troubleshooting systems.
              >You certainly followed a logical approach.
              >Given a few known good conditions(eg. power, reset, etc),
              >you can skip a few steps and it helps to have sockets too :)
              >Also LEDs never fail to offer clues.

              That is one thing that wasn't quite straight forward. Once the 6800 gets
              an invalid opcode all bets are off on what happens next. The reset and
              halt inputs to the 6800 didn't seem to do anything at times!!! I was
              watching the halt line while watching the data lines... Nothing! Because
              B2 was stuck low it was getting invalid opcodes I guess. The MITS
              documentation has a "fix" for the front panel board that will allow it to
              reset the 680 if it gets an invalid opcide. It involves cutting one trace
              on the back (non switch side) and two on the front. The addition of a
              10ohm resistor and a .1u cap. I'm not sure of the details yet...

              I was very lucky to have both the 680 Turnkey and "regular" front
              panels. The turnkey is worthless for troubleshooting.

              I'm troubleshooting another 680 right now, but it seems to be VERY
              sick. I'm going to hook up the scope and check the 2 phase clock... Its a
              digital storage scope so I will upload the results...

              Grant

            • Grant Stockly
              Another tip with the 680 is watch out for the power switch. While plugging in the serial cable I gave myself a little shock. I m fairly grounded where I am
              Message 6 of 9 , May 27, 2007
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                Another tip with the 680 is watch out for the power switch. While plugging
                in the serial cable I gave myself a little shock. I'm fairly grounded
                where I am and it hurt!

                Be safe guys! : )

                Grant
              • billdeg@aol.com
                In a message dated 5/27/2007 9:07:53 AM Eastern Daylight Time, ... Jack, Speaking of Bill Degnan I have been working on my 680 for the past two days. I found
                Message 7 of 9 , May 28, 2007
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                  In a message dated 5/27/2007 9:07:53 AM Eastern Daylight Time, 
                  jack.rubin@... writes:
                  
                  
                  > Thanks for your generosity and patience in sharing your work! I'll be > bringing my 680b to VCF next month - hope to exchange notes with Bill > Degnan. Will you be there too or is that just an urban myth? > > best, > Jack
                  Jack, Speaking of "Bill Degnan" I have been working on my 680 for the past two days. I found a copy of VTL (Very Tiny Language) for the Altair 680, and I am working to enter the entire thing into my computer manually, for the experience. The program fits on a 1K 680 with ACIA loaded as well. I understand how to enter values into an address, but I am a little shaky on how to read the code listing and translate some of the shorthand notations. I will be bringing my 680 to VCF E, along with my TRS 80 Mod 1 exhibit. Bill


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