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Group Description


Welcome to VLSICore Team




Slogan: Today's Bug - Tomorrow's Feature!


VLSICore deals with VLSI design on SoC / ASIC / FPGA design flows. It includes,



  • Digital Logic design, Full-Custom/Semi-Custom design.

  • Microprocessors, DSP, Telecom & more.

  • Nano Technology: 90nm, 45nm and beyond.
  • Foundry: TSMC, UMC, CSM, IBM, Tower
  • Standard / IO Cell library preparation, Intellectual Property [Memories, SRAMs, DRAMs, PCI, USB, Audio/Video CODEC], VDSM/UDSM.
  • Verilog, PLI, VHDL, EDIF, System Verilog, SystemC

  • Design Entry, Simulation, Formal Verification, Synthesis.

  • Floorplanning, HF Net Synthesis, Placement, Clock Tree Synthesis, Routing, Physical Verification, RC Extraction, DFM, OPC, Tape-Out.

  • Shell, Perl, Tcl, Tk/Tix, Scheme, C/C++, API, ...
  • Analog design, SPICE, Simulation, RF, PLL, High Speed CMOS, MEMS, ...
  • DFM (Design for Manufacturing)
  • EDA: Synopsys, Cadence, Mentor, Magma, Xilinx, Altera, Atmel, ...
  • Open Source EDA tools, Open Source : ASIC design and technology.


VLSICore Poll:

Your Physical Design Tool (2008)


No JOB mails

For Jobs - VLSI Careers


Tell about yourself, while you join the group.


VLSI Core Blog: VLSI-Core


In Association with:

Handasa Arabia Organization - Open Source Engineering.


Moderator: vlsicore-owner@yahoogroups.com

Group Information

  • 1421
  • Nanotechnology
  • Apr 4, 2003
  • English

Group Settings

  • This is a restricted group.
  • Attachments are permitted.
  • Members cannot hide email address.
  • Listed in Yahoo Groups directory.
  • Membership requires approval.
  • Messages require approval.
  • All members can post messages.

Message History