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GCC 3.4.3 with tms470 HEX FILE PROBLEMS

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  • shriram.sampat
    (The post looks long, but its mostly code ;)) Hello guys, I am trying to port some of my code from TI s compiler to gnu-arm-elf compiler for the TMS470 device.
    Message 1 of 1 , Nov 15, 2007
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      (The post looks long, but its mostly code ;))

      Hello guys,

      I am trying to port some of my code from TI's compiler to gnu-arm-elf
      compiler for the TMS470 device.

      I am able to successfully generate the hex files.

      I have a signum JTAGjet device to program this hex file to the controller.

      My controller has a bootloader installed so my firmware should start
      only from a certain address. I have a linker script file to instruct
      the linker accordingly. Somehow the ihex file generated by gnu.arm
      compiler is not complaint with normal standard OR my linker script is
      not good enough. I had the same linker script in TI's compiler and it
      worked well enough. In GCC i had to just change some syntax, but the
      file stays the same in its entirety.

      My main file runs something like

      #include "boot.h"

      #pragma DATA_SECTION (application_information, ".appinfo")

      /* Firmware Informationen */
      const APPLICATION_INFORMATION application_information = {
      APPLICATION_INFORMATION_MAGIC1, /*
      magic1 */
      "VF76B Modul - LWR-SG", /* name */
      0, /* version_major */
      0, /* version_minor */
      1, /* version_build */
      "", /* version_suffix */
      9, /* version_day */
      2, /* version_month */
      2007, /* version_year */
      2, /* build_string */

      APPLICATION_INFORMATION_FLAG_AUTOSTART, /* flags */
      0, /* reserved_word1 */
      0, /* reserved_word2 */
      0, /* reserved_word3 */
      0, /* reserved_word4 */
      0, /* reserved_word5 */
      0, /* reserved_word6 */
      0, /* reserved_word7 */
      0, /* reserved_word8 */
      APPLICATION_INFORMATION_MAGIC2 /*
      magic2 */
      };

      /***************************************************************************/

      #pragma DATA_SECTION (bootinfo, ".bootinfo")

      BOOTINFO bootinfo;

      void main(void)
      { while(1); }

      my linker script runs like

      /* create cinit code */
      /*-c*/

      MEMORY
      {
      VECTORS : ORIGIN = 0x00040000, LENGTH = 0x00000030 /* Flash ROM
      (512k = 0x00080000 available) */
      APPINFO : ORIGIN = 0x00040100, LENGTH = 0x00000100 /* 256 Byte */
      ROM : ORIGIN = 0x00040200, LENGTH = 0x0003fe00 /* 256 Byte *
      /* RAM (32k = 0x00008000 available) */
      SYSRAM : ORIGIN = 0x00400000, LENGTH = 0x00001000 /* 4k */
      DATARAM : ORIGIN = 0x00401000, LENGTH = 0x0000b000 /* 44k */

      HET0PROG : ORIGIN = 0x00800000, LENGTH = 0x0000b000 /* HET-RAM
      (2k = 0x00000800 available) */

      XREF : ORIGIN = 0x00800000, LENGTH = 0x0000b000 /* XREF Dummy
      Region */

      MPU : ORIGIN = 0xffe84000, LENGTH = 0x0000024 /* MPU Control
      Registers */
      FLASHCTL0 : ORIGIN = 0xffe88000, LENGTH = 0x00004000 /* Flash
      Control Registers */

      /* Peripheral Control Registers */

      SPI1 : ORIGIN = 0xfff7d400, LENGTH = 0x00000100
      SPI2 : ORIGIN = 0xfff7d500, LENGTH = 0x00000100
      CAN_MB0 : ORIGIN = 0xfff7e400, LENGTH = 0x00000200
      CAN_MB1 : ORIGIN = 0xfff7e600, LENGTH = 0x00000200
      CAN0 : ORIGIN = 0xfff7e800, LENGTH = 0x00000200
      CAN1 : ORIGIN = 0xfff7ea00, LENGTH = 0x00000200
      GIO : ORIGIN = 0xfff7ec00, LENGTH = 0x00000400
      ADC0 : ORIGIN = 0xfff7f000, LENGTH = 0x00000100
      SCI0 : ORIGIN = 0xfff7f400, LENGTH = 0x00000100
      SCI1 : ORIGIN = 0xfff7f500, LENGTH = 0x00000100
      SPI0 : ORIGIN = 0xfff7f800, LENGTH = 0x00000100
      HET0CTRL : ORIGIN = 0xfff7fc00, LENGTH = 0x00000100

      /* System Module Control Registers */
      DMACP : ORIGIN = 0xfffff800, LENGTH = 0x00000200 /* DMA
      controller */
      IEM : ORIGIN = 0xfffffc00, LENGTH = 0x00000100 /*
      Interrupt expansion module */
      MMC : ORIGIN = 0xfffffd00, LENGTH = 0x00000080 /*
      Memory controller */
      DEC : ORIGIN = 0xfffffe00, LENGTH = 0x00000080 /*
      Address manager */
      DMA : ORIGIN = 0xfffffe80, LENGTH = 0x00000080 /* DMA
      controller */
      RTI : ORIGIN = 0xffffff00, LENGTH = 0x00000020 /* RTI */
      CIM : ORIGIN = 0xffffff20, LENGTH = 0x00000020 /* CIM */
      PSA : ORIGIN = 0xffffff40, LENGTH = 0x00000020 /*
      Parallel signature analysis */
      SYS : ORIGIN = 0xffffffd0, LENGTH = 0x00000030 /*
      System control registers */
      }


      SECTIONS
      {
      /* Assigned to region VECTORS */
      /* Interrupt vectors */
      .intvecs : {} >VECTORS
      .appinfo : {} >APPINFO

      /* Assigned to regions ROM */
      .text : {} >ROM
      /* Executable code*/
      .cinit : {} >ROM
      /* Init tables */
      .const : {} >ROM
      /* Constant data */
      .data : {} >ROM
      /* Constant data */

      .irqtable : {} >SYSRAM
      .bootinfo : {} >SYSRAM

      /*
      */
      /* .stack : {_stack_loc_user = . + (0x1000 - (0x400 + 0x400
      + 0x0040 + 0x0040 + 0x0040)); */
      /* _stack_loc_fiq =
      _stack_loc_user + 0x0400; */
      /* _stack_loc_irq =
      _stack_loc_fiq + 0x0400; */
      /* _stack_loc_abort =
      _stack_loc_irq + 0x0040; */
      /* _stack_loc_undefined_instruction =
      _stack_loc_abort + 0x0040; */
      /* _stack_loc_supervisor =
      _stack_loc_undefined_instruction + 0x003c; */
      /* }
      */
      /*
      >SYSRAM */

      /* Dynamic memory allocation */
      .sysmem : {} >DATARAM

      /* Global and static variables */
      .bss : {} >DATARAM

      /* MUST BE LOCATED AT THE END OF DATARAM for flexible RAM allocation */
      .ramend : {} >DATARAM

      /* Assigned to region HET0PROG */
      /* HET0 program RAM */
      .HET0PROG : {_e_HETPROGRAM0_UN = .;}
      >HET0PROG


      /* Assigned to region XREF */
      /* Dummy region for cross reference files */
      .xref : {} >XREF


      /* Assigned to region MPU */
      /* MPU control registers */
      .MPU : {} >MPU


      /* Assigned to region FLASHCTL0 */
      .FLASHCTL0 : {} >FLASHCTL0


      /* Assigned to regions of peripheral control reigsters */
      /* SPI 1 control registers */
      .SPI1 : {} >SPI1

      /* SPI 2 control registers */
      .SPI2 : {} >SPI2

      /* HECC 1 DPRAM (mailbox) */
      .CAN_MB0 : {} >CAN_MB0

      /* HECC 2 DPRAM (mailbox) */
      .CAN_MB1 : {} >CAN_MB1

      /* HECC 1 control registers */
      .CAN0 : {} >CAN0

      /* HECC 2 control registers */
      .CAN1 : {} >CAN1

      /* GIO control registers */
      .GIO : {} >GIO

      /* ADC 0 control registers */
      .ADC0 : {} >ADC0

      /* SCI 0 control registers */
      .SCI0 : {} >SCI0

      /* SCI 1 control registers */
      .SCI1 : {} >SCI1

      /* SPI 0 control registers */
      .SPI0 : {} >SPI0

      /* HET0 control registers */
      .HET0CTRL : {} >HET0CTRL


      /* Assigned to reg. of System Module Control Registers */
      /* DMA controller control packets */
      .DMACP : {} >DMACP

      /* Interrupt expansion module control registers */
      .IEM : {} >IEM

      /* Memory controller control registers */
      .MMC : {} >MMC

      /* Address manager control registers */
      .DEC : {} >DEC

      /* DMA controller control registers */
      .DMA : {} >DMA

      /* RTI module control registers */
      .RTI : {_rtiRegs = .;} >RTI

      /* CIM control registers */
      .CIM : {_cimRegs = .;} >CIM

      /* System control registers */
      .SYS : {_conRegs = .;} >SYS
      }

      I need this bootinfo and appinfo structure as my bootloader detects a
      firmware only by these structures. And the appinfo structure is stored
      in a predefined memory location as defined in the linker script.

      somehow while trying to flash the end hex file generated by gcc, the
      programmer starts to erase from 0x000000 address, which erases the
      bootloader also. With the hex file generated from TI, the flash
      programmer does not do this. it erases the appropriate location
      automatically.

      I have a header dump from hex files generatedby TI compiler and gcc.
      they go something like

      TI Compiler :

      m_app.hex: file format ihex
      m_app.hex
      architecture: UNKNOWN!, flags 0x00000000:

      start address 0x00000000

      Sections:
      Idx Name Size VMA LMA File off Algn
      0 .sec1 00000024 00040000 00040000 00000011 2**0
      CONTENTS, ALLOC, LOAD
      1 .sec2 000000d4 00040100 00040100 00000073 2**0
      CONTENTS, ALLOC, LOAD
      2 .sec3 0000d3e4 00040200 00040200 00000276 2**0
      CONTENTS, ALLOC, LOAD
      SYMBOL TABLE:
      no symbols


      GCC:

      GNUARMapp.hex: file format ihex
      GNUARMapp.hex
      architecture: UNKNOWN!, flags 0x00000000:

      start address 0x00040200

      Sections:
      Idx Name Size VMA LMA File off Algn
      0 .sec1 000000d4 00000000 00000000 00000000 2**0
      CONTENTS, ALLOC, LOAD
      1 .sec2 000002c8 00040200 00040200 0000026f 2**0
      CONTENTS, ALLOC, LOAD
      SYMBOL TABLE:
      no symbols


      Both does not have the same code, but the point that catches my
      attention is the start address header. It is 0 for TI compiler and
      40200 for gnu arm. but the .sec1 VMA in gcc is 0 whereas in TI it is
      the right address as described in linker script. (I guess the .sec 1
      is where the vectors come in).

      Can anyone help me in troubleshooting this.

      DO i need to modify the linker script or is there any other way to use
      this generated hex file.

      Thanks a lot.

      Shriram
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