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Re: Byte access on the external SRAM problem

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  • WadeA & RebeccaM Smith
    I just ordered one of those boards, so I haven t had a chance to play with it. The boards with which I am working have 2 256KBx16 SRAM chips. No problems
    Message 1 of 2 , Nov 3, 2006
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      I just ordered one of those boards, so I haven't had a chance to play
      with it.
      The boards with which I am working have 2 256KBx16 SRAM chips. No
      problems there.
      You probably have it figured out by now, but... If your SRAM is 8
      bit, and since the Oki has a 16-bit data bus, you have to watch out
      for the UB/LB pins (upper byte/lower byte) which would translate into
      another address line (A0). I've had problems with these two lines
      on certain of our boards with hardware issues and makes those lines
      go wacky giving strange results when processing.

      wade

      --- In OKI-ARM-mcus@yahoogroups.com, "Dont Peek" <sri_ramesh@...>
      wrote:
      >
      > I am dabbling with the Olimex OKI-H5003 header board that has the
      > ML67Q5003 CPU. It has an external 8Meg SRAM from address $D0000000.
      > I am able to read and write to it from debugger after configuring
      > the BWC register. When I do memcpy it is overwriting on the even
      > location when you write to an odd location.
      > For example let us say the internal onboard RAM source data is
      > 18 F0 9F E5 18 F0 9F E5
      > After copying the bytewise to the External SRAM area I see
      > F0 F0 E5 E5 F0 F0 9F 9F
      > As it is evident from the above when we write the odd locations it
      > is overwriting the even ones.
      >
      > I tried in C as well as assembly.
      > My C code was both SRC and Dest pointers declared as unsigned char
      > ptrs. And simply the copy instruction was
      > *destptr++ = *srcptr++
      >
      > In assembly I tried:
      > mov r8,#INTRAMST
      > mov r9,#SRAMBASE
      > mov r5,#0
      >
      > loop: ldrb r4,[r8],#1
      > STRB r4,[r9],#1
      > ADD r5,#1
      > CMP r5,#7 /* Try copying about 7 bytes */
      > BNE loop
      >
      > My bus width is set for 16bits which I suspect may be the cause of
      > the problem and if I change that to 8 bits the SRAM access is not
      > possible. Has anyone seen similar problem. Maybe I am doing
      > something wrong. Is there anyway we can get the byte access mode to
      > work on this board.
      >
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