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need little help with IRQ

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  • Med
    Dear friends: I m using a develpment kit from oki with ml67k5003 on it. The compiler is gnu 3.4.3. The problem is that I can t make work the interrupt routine,
    Message 1 of 8 , Jun 3, 2006
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      Dear friends:

      I'm using a develpment kit from oki with ml67k5003 on it. The compiler
      is gnu 3.4.3. The problem is that I can't make work the interrupt
      routine, my routine is similar to the oki reentrant_irq.s, but I make
      some modifications to work without neesting.

      Here is that file, you can see a jump to led_on function at almost the
      end, up to that place all work as expected, so the problem must be on
      the return from interrupt sentence. Like I'm not an expert on arm
      assembler may be some of you can help me to solve this issue.

      IRQ_Handler:



      /* registers which may be overwritten are saved.(IRQ mode) */

      stmfd sp!, {r0-r12, r14}



      /* IRQ number is got from IRN register. IRQ number is saved to irn(r0). */

      MOV r5, #0x78000000

      LDR irn, [r5, #0x14] /* IRQ number is saved to irn(r0). */


      /*; address of IRQ_HANDLER_TABLE is saved to irq_handler_table(r1). */

      LDR r1, =IRQ_HANDLER_TABLE
      BL BRANCH_TO_HANDLER


      /*; the most significant '1' bit of CIL register is cleared. */

      /*; if arbitrary value is written in CILCL register, */

      /*; the most significant '1' bit of CIL register will be cleared. */
      MOV r5, #0x78000000

      STR cil_clear, [r5, #0x28]

      /* Up to here all seems to be just fine */
      mov r0, #0x0071 /*for show an F on display*/

      BL led_on


      /*; saved registers are restored, and control is returned from IRQ. */

      LDMFD sp!, {r0-r12, r14}
      subs pc, lr, #4

      /* end of IRQ_Handler */


      This never goes to the main() again after interrupt took place.
      Regards Mariano
    • Chris Hiszpanski
      Looks to me like you re missing a carot on: LDMFD sp!, {r0-r12, r14} I think it should be LDMFD sp!, {r0-r12, r14}^ which restores the CPSR from SPSR,
      Message 2 of 8 , Jun 4, 2006
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        Looks to me like you're missing a carot on:

        LDMFD sp!, {r0-r12, r14}

        I think it should be

        LDMFD sp!, {r0-r12, r14}^

        which restores the CPSR from SPSR, re-enabling interrupts. Note that doing
        this as you have it may lead to some critical code since you load the PC one
        instruction later. A better thing to do would be:

        SUB r14, r14, #4
        STMFD sp!, {r0-r12, r14}
        ...
        LDMFD sp!, {r0-r12, pc}^

        Chris


        >From: "Med" <wllkombi@...>
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        >To: OKI-ARM-mcus@yahoogroups.com
        >Subject: [OKI-ARM-mcus] need little help with IRQ
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        >
        >Dear friends:
        >
        >I'm using a develpment kit from oki with ml67k5003 on it. The compiler
        >is gnu 3.4.3. The problem is that I can't make work the interrupt
        >routine, my routine is similar to the oki reentrant_irq.s, but I make
        >some modifications to work without neesting.
        >
        >Here is that file, you can see a jump to led_on function at almost the
        >end, up to that place all work as expected, so the problem must be on
        >the return from interrupt sentence. Like I'm not an expert on arm
        >assembler may be some of you can help me to solve this issue.
        >
        >IRQ_Handler:
        >
        >
        >
        >/* registers which may be overwritten are saved.(IRQ mode) */
        >
        > stmfd sp!, {r0-r12, r14}
        >
        >
        >
        >/* IRQ number is got from IRN register. IRQ number is saved to irn(r0). */
        >
        > MOV r5, #0x78000000
        >
        > LDR irn, [r5, #0x14] /* IRQ number is saved to irn(r0). */
        >
        >
        >/*; address of IRQ_HANDLER_TABLE is saved to irq_handler_table(r1). */
        >
        > LDR r1, =IRQ_HANDLER_TABLE
        > BL BRANCH_TO_HANDLER
        >
        >
        >/*; the most significant '1' bit of CIL register is cleared. */
        >
        >/*; if arbitrary value is written in CILCL register, */
        >
        >/*; the most significant '1' bit of CIL register will be cleared. */
        > MOV r5, #0x78000000
        >
        > STR cil_clear, [r5, #0x28]
        >
        >/* Up to here all seems to be just fine */
        > mov r0, #0x0071 /*for show an F on display*/
        >
        > BL led_on
        >
        >
        >/*; saved registers are restored, and control is returned from IRQ. */
        >
        > LDMFD sp!, {r0-r12, r14}
        > subs pc, lr, #4
        >
        >/* end of IRQ_Handler */
        >
        >
        >This never goes to the main() again after interrupt took place.
        >Regards Mariano

        _________________________________________________________________
        On the road to retirement? Check out MSN Life Events for advice on how to
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      • Med
        Chris, I use this lines but problem is still there. I was thinking in change the compiler, but I think that all new version of gnuarm are for 64 bits PCs. Do
        Message 3 of 8 , Jun 5, 2006
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          Chris, I use this lines but problem is still there. I was thinking in
          change the compiler, but I think that all new version of gnuarm are
          for 64 bits PCs.
          Do you have another sugestion?

          Regards in advance.





          --- In OKI-ARM-mcus@yahoogroups.com, "Chris Hiszpanski" <chiszp@...>
          wrote:
          >
          > Looks to me like you're missing a carot on:
          >
          > LDMFD sp!, {r0-r12, r14}
          >
          > I think it should be
          >
          > LDMFD sp!, {r0-r12, r14}^
          >
          > which restores the CPSR from SPSR, re-enabling interrupts. Note that
          doing
          > this as you have it may lead to some critical code since you load
          the PC one
          > instruction later. A better thing to do would be:
          >
          > SUB r14, r14, #4
          > STMFD sp!, {r0-r12, r14}
          > ...
          > LDMFD sp!, {r0-r12, pc}^
          >
          > Chris
          >
          >
          > >From: "Med" <wllkombi@...>
          > >Reply-To: OKI-ARM-mcus@yahoogroups.com
          > >To: OKI-ARM-mcus@yahoogroups.com
          > >Subject: [OKI-ARM-mcus] need little help with IRQ
          > >Date: Sat, 03 Jun 2006 15:15:58 -0000
          > >MIME-Version: 1.0
          > >X-Originating-IP: 66.163.187.191
          > >X-Sender: wllkombi@...
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          > >FILETIME=[D507F6D0:01C68720]
          > >
          > >Dear friends:
          > >
          > >I'm using a develpment kit from oki with ml67k5003 on it. The compiler
          > >is gnu 3.4.3. The problem is that I can't make work the interrupt
          > >routine, my routine is similar to the oki reentrant_irq.s, but I make
          > >some modifications to work without neesting.
          > >
          > >Here is that file, you can see a jump to led_on function at almost the
          > >end, up to that place all work as expected, so the problem must be on
          > >the return from interrupt sentence. Like I'm not an expert on arm
          > >assembler may be some of you can help me to solve this issue.
          > >
          > >IRQ_Handler:
          > >
          > >
          > >
          > >/* registers which may be overwritten are saved.(IRQ mode) */
          > >
          > > stmfd sp!, {r0-r12, r14}
          > >
          > >
          > >
          > >/* IRQ number is got from IRN register. IRQ number is saved to
          irn(r0). */
          > >
          > > MOV r5, #0x78000000
          > >
          > > LDR irn, [r5, #0x14] /* IRQ number is saved to irn(r0). */
          > >
          > >
          > >/*; address of IRQ_HANDLER_TABLE is saved to irq_handler_table(r1). */
          > >
          > > LDR r1, =IRQ_HANDLER_TABLE
          > > BL BRANCH_TO_HANDLER
          > >
          > >
          > >/*; the most significant '1' bit of CIL register is cleared. */
          > >
          > >/*; if arbitrary value is written in CILCL register, */
          > >
          > >/*; the most significant '1' bit of CIL register will be cleared. */
          > > MOV r5, #0x78000000
          > >
          > > STR cil_clear, [r5, #0x28]
          > >
          > >/* Up to here all seems to be just fine */
          > > mov r0, #0x0071 /*for show an F on display*/
          > >
          > > BL led_on
          > >
          > >
          > >/*; saved registers are restored, and control is returned from IRQ. */
          > >
          > > LDMFD sp!, {r0-r12, r14}
          > > subs pc, lr, #4
          > >
          > >/* end of IRQ_Handler */
          > >
          > >
          > >This never goes to the main() again after interrupt took place.
          > >Regards Mariano
          >
          > _________________________________________________________________
          > On the road to retirement? Check out MSN Life Events for advice on
          how to
          > get there! http://lifeevents.msn.com/category.aspx?cid=Retirement
          >
        • kendwyer
          Hi Mariano Just wondered if you have the stacks correctly setup? You need to have the IRQ stack SP setup for the IRQ to work correctly..... Ken ... -0000 ...
          Message 4 of 8 , Jun 6, 2006
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            Hi Mariano

            Just wondered if you have the stacks correctly setup?
            You need to have the IRQ stack SP setup for the IRQ to work correctly.....

            Ken

            --- In OKI-ARM-mcus@yahoogroups.com, "Med" <wllkombi@...> wrote:
            >
            > Chris, I use this lines but problem is still there. I was thinking in
            > change the compiler, but I think that all new version of gnuarm are
            > for 64 bits PCs.
            > Do you have another sugestion?
            >
            > Regards in advance.
            >
            >
            >
            >
            >
            > --- In OKI-ARM-mcus@yahoogroups.com, "Chris Hiszpanski" <chiszp@>
            > wrote:
            > >
            > > Looks to me like you're missing a carot on:
            > >
            > > LDMFD sp!, {r0-r12, r14}
            > >
            > > I think it should be
            > >
            > > LDMFD sp!, {r0-r12, r14}^
            > >
            > > which restores the CPSR from SPSR, re-enabling interrupts. Note that
            > doing
            > > this as you have it may lead to some critical code since you load
            > the PC one
            > > instruction later. A better thing to do would be:
            > >
            > > SUB r14, r14, #4
            > > STMFD sp!, {r0-r12, r14}
            > > ...
            > > LDMFD sp!, {r0-r12, pc}^
            > >
            > > Chris
            > >
            > >
            > > >From: "Med" <wllkombi@>
            > > >Reply-To: OKI-ARM-mcus@yahoogroups.com
            > > >To: OKI-ARM-mcus@yahoogroups.com
            > > >Subject: [OKI-ARM-mcus] need little help with IRQ
            > > >Date: Sat, 03 Jun 2006 15:15:58 -0000
            > > >MIME-Version: 1.0
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            > > >X-Sender: wllkombi@
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            > > >X-OriginalArrivalTime: 03 Jun 2006 15:17:30.0941 (UTC)
            > > >FILETIME=[D507F6D0:01C68720]
            > > >
            > > >Dear friends:
            > > >
            > > >I'm using a develpment kit from oki with ml67k5003 on it. The
            compiler
            > > >is gnu 3.4.3. The problem is that I can't make work the interrupt
            > > >routine, my routine is similar to the oki reentrant_irq.s, but I make
            > > >some modifications to work without neesting.
            > > >
            > > >Here is that file, you can see a jump to led_on function at
            almost the
            > > >end, up to that place all work as expected, so the problem must be on
            > > >the return from interrupt sentence. Like I'm not an expert on arm
            > > >assembler may be some of you can help me to solve this issue.
            > > >
            > > >IRQ_Handler:
            > > >
            > > >
            > > >
            > > >/* registers which may be overwritten are saved.(IRQ mode) */
            > > >
            > > > stmfd sp!, {r0-r12, r14}
            > > >
            > > >
            > > >
            > > >/* IRQ number is got from IRN register. IRQ number is saved to
            > irn(r0). */
            > > >
            > > > MOV r5, #0x78000000
            > > >
            > > > LDR irn, [r5, #0x14] /* IRQ number is saved to irn(r0). */
            > > >
            > > >
            > > >/*; address of IRQ_HANDLER_TABLE is saved to
            irq_handler_table(r1). */
            > > >
            > > > LDR r1, =IRQ_HANDLER_TABLE
            > > > BL BRANCH_TO_HANDLER
            > > >
            > > >
            > > >/*; the most significant '1' bit of CIL register is cleared. */
            > > >
            > > >/*; if arbitrary value is written in CILCL register, */
            > > >
            > > >/*; the most significant '1' bit of CIL register will be cleared. */
            > > > MOV r5, #0x78000000
            > > >
            > > > STR cil_clear, [r5, #0x28]
            > > >
            > > >/* Up to here all seems to be just fine */
            > > > mov r0, #0x0071 /*for show an F on display*/
            > > >
            > > > BL led_on
            > > >
            > > >
            > > >/*; saved registers are restored, and control is returned from
            IRQ. */
            > > >
            > > > LDMFD sp!, {r0-r12, r14}
            > > > subs pc, lr, #4
            > > >
            > > >/* end of IRQ_Handler */
            > > >
            > > >
            > > >This never goes to the main() again after interrupt took place.
            > > >Regards Mariano
            > >
            > > _________________________________________________________________
            > > On the road to retirement? Check out MSN Life Events for advice on
            > how to
            > > get there! http://lifeevents.msn.com/category.aspx?cid=Retirement
            > >
            >
          • Med
            Ken: I download the example for oki on files, and with a little modifications I make work with linux. So I will look for differences between my program and
            Message 5 of 8 , Jun 6, 2006
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              Ken:
              I download the example for oki on files, and with a little
              modifications I make work with linux. So I will look for differences
              between my program and this example. With the problem finded, I will
              get back to the group.
              Regards Mariano.




              --- In OKI-ARM-mcus@yahoogroups.com, "kendwyer" <kendwyer@...> wrote:
              >
              > Hi Mariano
              >
              > Just wondered if you have the stacks correctly setup?
              > You need to have the IRQ stack SP setup for the IRQ to work
              correctly.....
              >
              > Ken
              >
              > --- In OKI-ARM-mcus@yahoogroups.com, "Med" <wllkombi@> wrote:
              > >
              > > Chris, I use this lines but problem is still there. I was thinking in
              > > change the compiler, but I think that all new version of gnuarm are
              > > for 64 bits PCs.
              > > Do you have another sugestion?
              > >
              > > Regards in advance.
              > >
              > >
              > >
              > >
              > >
              > > --- In OKI-ARM-mcus@yahoogroups.com, "Chris Hiszpanski" <chiszp@>
              > > wrote:
              > > >
              > > > Looks to me like you're missing a carot on:
              > > >
              > > > LDMFD sp!, {r0-r12, r14}
              > > >
              > > > I think it should be
              > > >
              > > > LDMFD sp!, {r0-r12, r14}^
              > > >
              > > > which restores the CPSR from SPSR, re-enabling interrupts. Note that
              > > doing
              > > > this as you have it may lead to some critical code since you load
              > > the PC one
              > > > instruction later. A better thing to do would be:
              > > >
              > > > SUB r14, r14, #4
              > > > STMFD sp!, {r0-r12, r14}
              > > > ...
              > > > LDMFD sp!, {r0-r12, pc}^
              > > >
              > > > Chris
              > > >
              > > >
              > > > >From: "Med" <wllkombi@>
              > > > >Reply-To: OKI-ARM-mcus@yahoogroups.com
              > > > >To: OKI-ARM-mcus@yahoogroups.com
              > > > >Subject: [OKI-ARM-mcus] need little help with IRQ
              > > > >Date: Sat, 03 Jun 2006 15:15:58 -0000
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              > > > >X-OriginalArrivalTime: 03 Jun 2006 15:17:30.0941 (UTC)
              > > > >FILETIME=[D507F6D0:01C68720]
              > > > >
              > > > >Dear friends:
              > > > >
              > > > >I'm using a develpment kit from oki with ml67k5003 on it. The
              > compiler
              > > > >is gnu 3.4.3. The problem is that I can't make work the interrupt
              > > > >routine, my routine is similar to the oki reentrant_irq.s, but
              I make
              > > > >some modifications to work without neesting.
              > > > >
              > > > >Here is that file, you can see a jump to led_on function at
              > almost the
              > > > >end, up to that place all work as expected, so the problem must
              be on
              > > > >the return from interrupt sentence. Like I'm not an expert on arm
              > > > >assembler may be some of you can help me to solve this issue.
              > > > >
              > > > >IRQ_Handler:
              > > > >
              > > > >
              > > > >
              > > > >/* registers which may be overwritten are saved.(IRQ mode) */
              > > > >
              > > > > stmfd sp!, {r0-r12, r14}
              > > > >
              > > > >
              > > > >
              > > > >/* IRQ number is got from IRN register. IRQ number is saved to
              > > irn(r0). */
              > > > >
              > > > > MOV r5, #0x78000000
              > > > >
              > > > > LDR irn, [r5, #0x14] /* IRQ number is saved to irn(r0). */
              > > > >
              > > > >
              > > > >/*; address of IRQ_HANDLER_TABLE is saved to
              > irq_handler_table(r1). */
              > > > >
              > > > > LDR r1, =IRQ_HANDLER_TABLE
              > > > > BL BRANCH_TO_HANDLER
              > > > >
              > > > >
              > > > >/*; the most significant '1' bit of CIL register is cleared. */
              > > > >
              > > > >/*; if arbitrary value is written in CILCL register, */
              > > > >
              > > > >/*; the most significant '1' bit of CIL register will be
              cleared. */
              > > > > MOV r5, #0x78000000
              > > > >
              > > > > STR cil_clear, [r5, #0x28]
              > > > >
              > > > >/* Up to here all seems to be just fine */
              > > > > mov r0, #0x0071 /*for show an F on display*/
              > > > >
              > > > > BL led_on
              > > > >
              > > > >
              > > > >/*; saved registers are restored, and control is returned from
              > IRQ. */
              > > > >
              > > > > LDMFD sp!, {r0-r12, r14}
              > > > > subs pc, lr, #4
              > > > >
              > > > >/* end of IRQ_Handler */
              > > > >
              > > > >
              > > > >This never goes to the main() again after interrupt took place.
              > > > >Regards Mariano
              > > >
              > > > _________________________________________________________________
              > > > On the road to retirement? Check out MSN Life Events for advice on
              > > how to
              > > > get there! http://lifeevents.msn.com/category.aspx?cid=Retirement
              > > >
              > >
              >
            • Med
              Stacks are correct, problem was on irq routine, and with the lines that Chris send me, all work just fine. Unfortunly I was´nt able to see it because I maid
              Message 6 of 8 , Jun 9, 2006
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                Stacks are correct, problem was on irq routine, and with the lines
                that Chris send me, all work just fine. Unfortunly I was´nt able to
                see it because I maid some mistake on the main() function. Now I just
                corrct my main() and all is going well.
                So thanks Chris and Ken.


                --- In OKI-ARM-mcus@yahoogroups.com, "kendwyer" <kendwyer@...> wrote:
                >
                > Hi Mariano
                >
                > Just wondered if you have the stacks correctly setup?
                > You need to have the IRQ stack SP setup for the IRQ to work
                correctly.....
                >
                > Ken
                >
                > --- In OKI-ARM-mcus@yahoogroups.com, "Med" <wllkombi@> wrote:
                > >
                > > Chris, I use this lines but problem is still there. I was
                thinking in
                > > change the compiler, but I think that all new version of gnuarm
                are
                > > for 64 bits PCs.
                > > Do you have another sugestion?
                > >
                > > Regards in advance.
                > >
                > >
                > >
                > >
                > >
                > > --- In OKI-ARM-mcus@yahoogroups.com, "Chris Hiszpanski" <chiszp@>
                > > wrote:
                > > >
                > > > Looks to me like you're missing a carot on:
                > > >
                > > > LDMFD sp!, {r0-r12, r14}
                > > >
                > > > I think it should be
                > > >
                > > > LDMFD sp!, {r0-r12, r14}^
                > > >
                > > > which restores the CPSR from SPSR, re-enabling interrupts. Note
                that
                > > doing
                > > > this as you have it may lead to some critical code since you
                load
                > > the PC one
                > > > instruction later. A better thing to do would be:
                > > >
                > > > SUB r14, r14, #4
                > > > STMFD sp!, {r0-r12, r14}
                > > > ...
                > > > LDMFD sp!, {r0-r12, pc}^
                > > >
                > > > Chris
                > > >
                > > >
                > > > >From: "Med" <wllkombi@>
                > > > >Reply-To: OKI-ARM-mcus@yahoogroups.com
                > > > >To: OKI-ARM-mcus@yahoogroups.com
                > > > >Subject: [OKI-ARM-mcus] need little help with IRQ
                > > > >Date: Sat, 03 Jun 2006 15:15:58 -0000
                > > > >MIME-Version: 1.0
                > > > >X-Originating-IP: 66.163.187.191
                > > > >X-Sender: wllkombi@
                > > > >Received: from n17a.bullet.scd.yahoo.com ([66.94.237.46]) by
                > > > >bay0-mc11-f11.bay0.hotmail.com with Microsoft
                > > SMTPSVC(6.0.3790.1830); Sat,
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                > > > >X-OriginalArrivalTime: 03 Jun 2006 15:17:30.0941 (UTC)
                > > > >FILETIME=[D507F6D0:01C68720]
                > > > >
                > > > >Dear friends:
                > > > >
                > > > >I'm using a develpment kit from oki with ml67k5003 on it. The
                > compiler
                > > > >is gnu 3.4.3. The problem is that I can't make work the
                interrupt
                > > > >routine, my routine is similar to the oki reentrant_irq.s, but
                I make
                > > > >some modifications to work without neesting.
                > > > >
                > > > >Here is that file, you can see a jump to led_on function at
                > almost the
                > > > >end, up to that place all work as expected, so the problem
                must be on
                > > > >the return from interrupt sentence. Like I'm not an expert on
                arm
                > > > >assembler may be some of you can help me to solve this issue.
                > > > >
                > > > >IRQ_Handler:
                > > > >
                > > > >
                > > > >
                > > > >/* registers which may be overwritten are saved.(IRQ mode) */
                > > > >
                > > > > stmfd sp!, {r0-r12, r14}
                > > > >
                > > > >
                > > > >
                > > > >/* IRQ number is got from IRN register. IRQ number is saved to
                > > irn(r0). */
                > > > >
                > > > > MOV r5, #0x78000000
                > > > >
                > > > > LDR irn, [r5, #0x14] /* IRQ number is saved to irn
                (r0). */
                > > > >
                > > > >
                > > > >/*; address of IRQ_HANDLER_TABLE is saved to
                > irq_handler_table(r1). */
                > > > >
                > > > > LDR r1, =IRQ_HANDLER_TABLE
                > > > > BL BRANCH_TO_HANDLER
                > > > >
                > > > >
                > > > >/*; the most significant '1' bit of CIL register is cleared. */
                > > > >
                > > > >/*; if arbitrary value is written in CILCL register, */
                > > > >
                > > > >/*; the most significant '1' bit of CIL register will be
                cleared. */
                > > > > MOV r5, #0x78000000
                > > > >
                > > > > STR cil_clear, [r5, #0x28]
                > > > >
                > > > >/* Up to here all seems to be just fine */
                > > > > mov r0, #0x0071 /*for show an F on display*/
                > > > >
                > > > > BL led_on
                > > > >
                > > > >
                > > > >/*; saved registers are restored, and control is returned from
                > IRQ. */
                > > > >
                > > > > LDMFD sp!, {r0-r12, r14}
                > > > > subs pc, lr, #4
                > > > >
                > > > >/* end of IRQ_Handler */
                > > > >
                > > > >
                > > > >This never goes to the main() again after interrupt took place.
                > > > >Regards Mariano
                > > >
                > > >
                _________________________________________________________________
                > > > On the road to retirement? Check out MSN Life Events for advice
                on
                > > how to
                > > > get there! http://lifeevents.msn.com/category.aspx?
                cid=Retirement
                > > >
                > >
                >
              • rsprowson
                Message 7 of 8 , Jun 25, 2006
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                  --- In OKI-ARM-mcus@yahoogroups.com, "Med" <wllkombi@...> wrote:>> Stacks are correct, problem was on irq routine, and with the lines > that Chris send me, all work just fine. The two sequences were equivalent though, so why would that make any difference? SUB lr, lr, #4 STMFD sp!, {r0-r12, lr} : handlers : LDMFD sp!, {r0-r12, pc}^and STMFD sp!, {r0-r12, lr} : handlers : LDMFD sp!, {r0-r12, lr} SUBS pc, lr, #4> > > > I think it should be> > > > > > > > LDMFD sp!, {r0-r12, r14}^> > > > > > > > which restores the CPSR from SPSR, re-enabling interrupts. Leaving you with an adjusted r14, which then gets adjusted a second time in the following SUBS instruction in the original poster's code - so the instruction before the exception gets executed a second time. Additionally as there's no SPSR in user mode (which I assume is the default mode) the SUBS would mangle the user mode flags.The original OKI code entry/exit was just fine,Sprow.
                • Med
                  Sprow: This message is a little confusing, but I will write my code in the following lines, so if you see that something is not correct, please let me know.
                  Message 8 of 8 , Jun 27, 2006
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                    Sprow:
                    This message is a little confusing, but I will write my code in the
                    following lines, so if you see that something is not correct, please
                    let me know.
                    Regards Mariano

                    //here we enter on irq mode
                    SUB r14, r14, #4
                    stmfd sp!, {r0-r12, r14}

                    MOV r5, #0x78000000
                    LDR irn, [r5, #0x14]

                    LDR r1, =IRQ_HANDLER_TABLE
                    BL BRANCH_TO_HANDLER

                    MOV r5, #0x78000000
                    STR cil_clear, [r5, #0x28]

                    LDMFD sp!, {r0-r12, pc}^
                    //here we go to usr mode



                    --- In OKI-ARM-mcus@yahoogroups.com, "rsprowson" <news@...> wrote:
                    >
                    > --- In OKI-ARM-mcus@yahoogroups.com, "Med" <wllkombi@> wrote:>>
                    Stacks are correct, problem was on irq routine, and with the lines >
                    that Chris send me, all work just fine. The two sequences were
                    equivalent though, so why would that make any difference? SUB lr,
                    lr, #4 STMFD sp!, {r0-r12, lr} : handlers : LDMFD sp!,
                    {r0-r12, pc}^and STMFD sp!, {r0-r12, lr} : handlers : LDMFD
                    sp!, {r0-r12, lr} SUBS pc, lr, #4> > > > I think it should be> > >
                    > > > > > LDMFD sp!, {r0-r12, r14}^> > > > > > > > which restores
                    the CPSR from SPSR, re-enabling interrupts. Leaving you with an
                    adjusted r14, which then gets adjusted a second time in the following
                    SUBS instruction in the original poster's code - so the instruction
                    before the exception gets executed a second time. Additionally as
                    there's no SPSR in user mode (which I assume is the default mode) the
                    SUBS would mangle the user mode flags.The original OKI code entry/exit
                    was just fine,Sprow.
                    >
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