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ATS-3b Help! High receive current and hot ICs

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  • dk7fh
    Last year I gladly received a original packed ATS-3b kit (Final Sept. 10 2007 with V 1.8) and meanwhile I assembled it and it worked from the beginning (Still
    Message 1 of 9 , Mar 9, 2013
      Last year I gladly received a original packed ATS-3b kit (Final Sept. 10 2007 with V 1.8) and meanwhile I assembled it and it worked from the beginning (Still cannot believe it!!!).

      I already had some fine qsos on 40m and begin loving this amazing little rig! My compliments and thanks to the constructor Steven!

      Some day after a qso as I touched the circuit board it was quite warm. A closer "feel" showed, that U8 and U9 become good warm even in receive mode when working with 9V and really hot when using 12V. As I measure the receive current, no signal, it is 100mA, which seems a lot to much.

      So I did troubleshooting back and forth. Controlling the soldering with a real good binocular loupe, checking that I put the right parts in the proper place and so on. I also measured the voltages and found some but as I believe not dramatic differences to the IC Voltage tables.

      As I returned to the initial checks (without L3) I recognised, that the PA Gates of Q6 to Q8 were not 0 V but 0.8 V.

      So what can I do? Mounting some little heat sinks and providing enough battery capacity?

      Thankful for any hint!

      Frank, dk7fh, Cologne
    • jgaffke
      Should be fixed, or something might fail eventually. U8 should definitely pull those gates all the way to ground. If you have a scope you might make sure that
      Message 2 of 9 , Mar 9, 2013
        Should be fixed, or something might fail eventually.
        U8 should definitely pull those gates all the way to ground.
        If you have a scope you might make sure that it is 0.8 volts DC,
        and that you are not just measuring the average of a 7MHz signal.

        My best guess would be a solder short under U8.
        Unfortunately the manual in the files section for the ATS3B
        is missing a few pin numbers for U8 in the schematics, and
        the schematics are inconsistent with the photograph in the
        manual showing pin 13 of U8 driving the FET's. I don't know
        how U8 is actually wired as I do not have an ATS3B.

        Check for shorts around U8, perhaps using an ohm meter and
        sewing needles for probes. If you don't find anything,
        then power it up from a 9 volt battery and record the voltages
        to ground at each of the 14 pins around U8 when in receive mode.
        If L3 is back in, there should be no voltage you can measure
        to ground from either end of L3 when in receive mode.

        Let us know what voltages you see.

        Jerry, KE7ER


        --- In AT_Sprint@yahoogroups.com, "dk7fh" <fbrakonier@...> wrote:
        > As I returned to the initial checks (without L3) I recognised, that the PA Gates of Q6 to Q8 were not 0 V but 0.8 V.
      • Dale Putnam
        It may also be fruitful, to check the finals, to insure they are intact and usable. Checking the drive to the finals would be interesting too. Have a great
        Message 3 of 9 , Mar 9, 2013
          It may also be fruitful, to check the finals, to insure they are intact and usable. Checking the drive to the finals would be interesting too.
          Have a great day,
          Dale - WC7S

          -----Original Message-----
          From: jgaffke <jgaffke@...>
          Date: Sun, 10 Mar 2013 03:52:25
          To: <AT_Sprint@yahoogroups.com>
          Subject: [AT_Sprint] Re: ATS-3b Help! High receive current and hot ICs

           



          Should be fixed, or something might fail eventually.
          U8 should definitely pull those gates all the way to ground.
          If you have a scope you might make sure that it is 0.8 volts DC,
          and that you are not just measuring the average of a 7MHz signal.

          My best guess would be a solder short under U8.
          Unfortunately the manual in the files section for the ATS3B
          is missing a few pin numbers for U8 in the schematics, and
          the schematics are inconsistent with the photograph in the
          manual showing pin 13 of U8 driving the FET's. I don't know
          how U8 is actually wired as I do not have an ATS3B.

          Check for shorts around U8, perhaps using an ohm meter and
          sewing needles for probes. If you don't find anything,
          then power it up from a 9 volt battery and record the voltages
          to ground at each of the 14 pins around U8 when in receive mode.
          If L3 is back in, there should be no voltage you can measure
          to ground from either end of L3 when in receive mode.

          Let us know what voltages you see.

          Jerry, KE7ER

          --- In AT_Sprint@yahoogroups.com <mailto:AT_Sprint%40yahoogroups.com> , "dk7fh" <fbrakonier@...> wrote:
          > As I returned to the initial checks (without L3) I recognised, that the PA Gates of Q6 to Q8 were not 0 V but 0.8 V.
        • jgaffke
          Dale, I doubt it is just a matter of damaged FETs, Q5 should be off during receive so there should be no power through L3 that would pull the gates up to 0.8
          Message 4 of 9 , Mar 9, 2013
            Dale,
            I doubt it is just a matter of damaged FETs, Q5 should be off
            during receive so there should be no power through L3 that would
            pull the gates up to 0.8 volts even if the finals were internally
            shorted.
            The drive to the finals is U8, which is where I asked him to take
            voltmeter readings. Let us know if you have any ideas on a
            specific procedure he might try. I assume he has no scope.
            Jerry, KE7ER


            --- In AT_Sprint@yahoogroups.com, "Dale Putnam " <daleputnam@...> wrote:
            >
            > It may also be fruitful, to check the finals, to insure they are intact and usable. Checking the drive to the finals would be interesting too.
            > Have a great day,
            > Dale - WC7S
            >
          • dk7fh
            Thanks a lot for your quick answers, Jerry and Dale! I will do some more measurements and ask neighbor-hams who have scopes to help me. The finals seem to be
            Message 5 of 9 , Mar 10, 2013
              Thanks a lot for your quick answers, Jerry and Dale!

              I will do some more measurements and ask neighbor-hams who have scopes to help me.

              The finals seem to be ok. In comparison to my FT-817 the power output is as expected. And the rest works fine as well. I am just afraid of damaging my kit by heat and overcurrent.

              The dicrepancy between the schematics and the wirering on the cicuit board is a problem now. I will check the fotos I took from the board before assembling.

              You will hear from me as soon as I have some new infos.

              73s, Frank

              --- In AT_Sprint@yahoogroups.com, "jgaffke" <jgaffke@...> wrote:
              >
              > Should be fixed, or something might fail eventually.
              > U8 should definitely pull those gates all the way to ground.
              > If you have a scope you might make sure that it is 0.8 volts DC,
              > and that you are not just measuring the average of a 7MHz signal.
              >
              > My best guess would be a solder short under U8.
              > Unfortunately the manual in the files section for the ATS3B
              > is missing a few pin numbers for U8 in the schematics, and
              > the schematics are inconsistent with the photograph in the
              > manual showing pin 13 of U8 driving the FET's. I don't know
              > how U8 is actually wired as I do not have an ATS3B.
              >
              > Check for shorts around U8, perhaps using an ohm meter and
              > sewing needles for probes. If you don't find anything,
              > then power it up from a 9 volt battery and record the voltages
              > to ground at each of the 14 pins around U8 when in receive mode.
              > If L3 is back in, there should be no voltage you can measure
              > to ground from either end of L3 when in receive mode.
              >
              > Let us know what voltages you see.
              >
              > Jerry, KE7ER
              >
              >
              > --- In AT_Sprint@yahoogroups.com, "dk7fh" <fbrakonier@> wrote:
              > > As I returned to the initial checks (without L3) I recognised, that the PA Gates of Q6 to Q8 were not 0 V but 0.8 V.
              >
            • dk7fh
              PROBLEM SOLVED !!! -- BAD SOLDERING Jerry, Wolfgang (who called me by phone!) and Dale many thanks again for your help !!!! How did it come? First I obtained
              Message 6 of 9 , Mar 10, 2013
                PROBLEM SOLVED !!! --> BAD SOLDERING

                Jerry, Wolfgang (who called me by phone!) and Dale many thanks again for your help !!!!

                How did it come?

                First I obtained a datasheet of the 74AC02 (U8 NOR gates). Then I measured the voltages around this IC and pin 7 which was ment to be ground had 0.7V! And there it was. The leg was soldered but underneath with bad contact to the board.

                Minutes later everything seemed to be as it should: receive current 35mA, gates of the finals 0V and normal temperature, transmitting and receiving ok.

                THANK GOODNESS !

                Now I am looking forward for many qsos and much fun with this tiny rig.

                Good evening and good night to everybody and have a good start towards the new week!

                Glad Frank, dk7fh


                --- In AT_Sprint@yahoogroups.com, "jgaffke" <jgaffke@...> wrote:
                >
                > Dale,
                > I doubt it is just a matter of damaged FETs, Q5 should be off
                > during receive so there should be no power through L3 that would
                > pull the gates up to 0.8 volts even if the finals were internally
                > shorted.
                > The drive to the finals is U8, which is where I asked him to take
                > voltmeter readings. Let us know if you have any ideas on a
                > specific procedure he might try. I assume he has no scope.
                > Jerry, KE7ER
                >
                >
                > --- In AT_Sprint@yahoogroups.com, "Dale Putnam " <daleputnam@> wrote:
                > >
                > > It may also be fruitful, to check the finals, to insure they are intact and usable. Checking the drive to the finals would be interesting too.
                > > Have a great day,
                > > Dale - WC7S
                > >
                >
              • jgaffke
                Frank, Good to hear you got it fixed! I think you re done! But I m still puzzled as to why things were heating up. The newer ATS3B1 manual does show U8 s
                Message 7 of 9 , Mar 10, 2013
                  Frank,
                  Good to hear you got it fixed! I think you're done!
                  But I'm still puzzled as to why things were heating up.

                  The newer "ATS3B1" manual does show U8's pin 13 driving the FETs.
                  With pin 7 not soldered to board ground, power supply currents
                  would have to exit through the protection diodes at two input
                  pins that are grounded. So the 74AC02's internal ground would
                  be a half volt or so above board ground, and it could not
                  pull pin 13 all the way to ground. That much makes sense.
                  However, not obvious to me why it would suck an extra 70 ma.
                  I was expecting the problem to be something more like an output
                  shorted to an input putting a NOR gate in the transition region.
                  Jerry, KE7ER

                  --- In AT_Sprint@yahoogroups.com, "dk7fh" <fbrakonier@...> wrote:
                  > PROBLEM SOLVED !!! --> BAD SOLDERING
                • Johnny Matlock
                  Good going Frank! Glad you got your little rig working. You had some pretty great support hams on you side! Those little spider legs on the chips can be
                  Message 8 of 9 , Mar 10, 2013
                    Good going Frank!
                    Glad you got your little rig working.
                    You had some pretty great support hams on you side!
                    Those little spider legs on the chips can be deceiving.
                    I had some problems with those on my MTR build.
                    72 es gud DX
                    Johnny AC0BQ

                    On Sunday, March 10, 2013, dk7fh wrote:
                     

                    PROBLEM SOLVED !!! --> BAD SOLDERING

                    Jerry, Wolfgang (who called me by phone!) and Dale many thanks again for your help !!!!

                    How did it come?

                    First I obtained a datasheet of the 74AC02 (U8 NOR gates). Then I measured the voltages around this IC and pin 7 which was ment to be ground had 0.7V! And there it was. The leg was soldered but underneath with bad contact to the board.

                    Minutes later everything seemed to be as it should: receive current 35mA, gates of the finals 0V and normal temperature, transmitting and receiving ok.

                    THANK GOODNESS !

                    Now I am looking forward for many qsos and much fun with this tiny rig.

                    Good evening and good night to everybody and have a good start towards the new week!

                    Glad Frank, dk7fh

                    --- In AT_Sprint@yahoogroups.com, "jgaffke" <jgaffke@...> wrote:
                    >
                    > Dale,
                    > I doubt it is just a matter of damaged FETs, Q5 should be off
                    > during receive so there should be no power through L3 that would
                    > pull the gates up to 0.8 volts even if the finals were internally
                    > shorted.
                    > The drive to the finals is U8, which is where I asked him to take
                    > voltmeter readings. Let us know if you have any ideas on a
                    > specific procedure he might try. I assume he has no scope.
                    > Jerry, KE7ER
                    >
                    >
                    > --- In AT_Sprint@yahoogroups.com, "Dale Putnam " <daleputnam@> wrote:
                    > >
                    > > It may also be fruitful, to check the finals, to insure they are intact and usable. Checking the drive to the finals would be interesting too.
                    > > Have a great day,
                    > > Dale - WC7S
                    > >
                    >

                  • jgaffke
                    ... Might be the parasitic PNP/NPN transistors inherent in CMOS chips: http://www.fairchildsemi.com/an/AN/AN-600.pdf Once you exceed the Absolute Maximum
                    Message 9 of 9 , Mar 10, 2013
                      --- In AT_Sprint@yahoogroups.com, "jgaffke" <jgaffke@...> wrote:
                      > ... But I'm still puzzled as to why things were heating up...

                      Might be the parasitic PNP/NPN transistors inherent in CMOS chips:
                      http://www.fairchildsemi.com/an/AN/AN-600.pdf
                      Once you exceed the "Absolute Maximum Ratings" (input voltage
                      went well below chip's ground pin), most anything might happen.

                      If anyone out there can shed more light on this, I'm all ears.
                      Might accidentally learn something.

                      Jerry, KE7ER
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