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Reading more than 8 bytes in I2C master mode

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  • christian.heidler
    Does anyone tried to read more than 8 bytes in i2c master mode? There is the 3 bit register I2CxCNT which controlls the amount of bytes you can read from the
    Message 1 of 4 , Aug 17, 2007
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      Does anyone tried to read more than 8 bytes in i2c master mode?
      There is the 3 bit register I2CxCNT which controlls the amount of
      bytes you can read from the I2C slave during one I2C access.
      I tried to repeat the read process after 8 bytes to read 8 more bytes
      but this is - because of the start/stop condition in between - not the
      same as reading 16 bytes directly after another.

      christian
    • martinvican
      Hi Christian, p.11 in AN-895 states: I2CxCNT is a LOAD register to internal counter... it is possible to RELOAD the internal counter by writing I2CxADR during
      Message 2 of 4 , Aug 19, 2007
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        Hi Christian,

        p.11 in AN-895 states: I2CxCNT is a LOAD register to internal counter...
        it is possible to RELOAD the internal counter by writing I2CxADR
        during transmit sequence...

        I do this in IRQ routine while master RX irq flag is on:

        c=I2C1MRX;
        ...
        ...
        I2C1CNT=7;
        I2C1ADR &= 0xFF; // reloads internal counter

        and it works fine, it doesn't terminate i2c (don't STOP), only reload
        number of assumed bytes, good luck!

        Martin

        btw: How did you implement repeated start in master mode?
      • Jean-Marc Rouxel
        Hello, For the repeated start in master mode, here is a discussion with an AD engineer.
        Message 3 of 4 , Aug 20, 2007
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          Hello,

           

          For the repeated start in master mode, here is a discussion with an AD engineer.

           

          <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<

          Hello Jean-Marc,

           

          Unfortunately, the ADuC7024 is not capable of directly generating a Repeated Start which is I believe the problem when you are interfacing to the Agilent device.

          I don't believe the attached workaround will help you, but, it is the only way I know of suppressing the Stop at the end of the write sequence so as the subsequent start before the read will appear as a Repeated Start.

           

          If you have any further questions, please contact me.

          Best regards,

          Mike Looney.

          >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

           

          Unfortunately, I don’t succeed to implement this “repeated start”.

          Good luck.

           

          Jean-Marc

           

          -----Message d'origine-----
          De : ADuC_ARM@yahoogroups.com [mailto:ADuC_ARM@yahoogroups.com] De la part de martinvican
          Envoyé : lundi 20 août 2007 08:44
          À : ADuC_ARM@yahoogroups.com
          Objet : [ADuC_ARM] Re: Reading more than 8 bytes in I2C master mode

           

          Hi Christian,

          p.11 in AN-895 states: I2CxCNT is a LOAD register to internal counter...
          it is possible to RELOAD the internal counter by writing I2CxADR
          during transmit sequence...

          I do this in IRQ routine while master RX irq flag is on:

          c=I2C1MRX;
          ...
          ...
          I2C1CNT=7;
          I2C1ADR &= 0xFF; // reloads internal counter

          and it works fine, it doesn't terminate i2c (don't STOP), only reload
          number of assumed bytes, good luck!

          Martin

          btw: How did you implement repeated start in master mode?

        • martinvican
          Hi Jean-Marc, I have successfully implemented repeated start in the master mode, but it s too complicated. I used a timer for proper timing between last sent
          Message 4 of 4 , Aug 20, 2007
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            Hi Jean-Marc,

            I have successfully implemented repeated start in the master mode, but
            it's too complicated. I used a timer for proper timing between last
            sent byte (to MTX) and repeated start. Everything is based on
            interrupts, because it is really nonsense to delay execution of other
            tasks while waiting for fifo to empty (as in the example in the app
            note). Value for timer reload is adaptive and is based on successive
            i2c readings to set proper delay for next case (it learns its own
            delay value).
            The principle is clear and is the same as in the example in the AN-895.

            There's a lack of generating an interrupt in case of TX FIFO turns to
            empty.

            I'd like to know if there exists more elegant solution for repeated
            start. I've spent a lot of time with experiment to understand how to
            implement i2c master communication.

            Martin
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