Just for completeness, I should mention that I use 3 and 4 MHz tones for all
my IMD testing, and for these circuits, set for -10 dBm each tone at the
output, as seen on the spectrum analyzer.
----- Original Message -----
From: "Chris Trask" <christrask@...>
Sent: Sunday, June 10, 2007 3:14 PM
Subject: Re: [loopantennas] Re: Trask Active antenna design #2 tested
> Prior to breadboarding this, I went back and forth with the PSpice
> models to determine where the discrepancies. I went so far as to remove
> 2N2907 emitter bypass capacitor, but that resulted in a loss of -6dB. So,
> rearranged the input to place the 50-ohm termination ahead of the blocking
> capacitor, changed the blocking capacitor to 10pF, then added a 100K
> resistor from the JFET gate to ground, and then I saw the -3dB of midband
> So now I see why my model gain and your measured gain are so far apart
> this last time around. I was measuring the gain grom the JFET gate to the
> output, and you're measuring it from the 50-ohm load AHEAD of the 10pF
> capacitor to the output.
> That being the case, I now have to wonder what effect this 10pF
> capacitor has on the IMD performance. So, could you take both of these
> circuits, replace the 10pF capacitor with 0.1uF, and then measure again?
> suspicion here is that the JFET drain voltage in my circuit is feeding
> to the gate and combined with your 10pF coupling capacitor is causing the
> IMD performance to degrade.