I just got a loaner ESI "Waveterminal 192X" (192kHz/24bit two analog in, 4 analog out) card from a friend to try out on my softrock. Does anyone know any...
Hi! Try Kikad here too good for free http://www.lis.inpg.fr/realise_au_lis/kicad/index.html BTW I have received 9850,51 as well as 8307 from AD as samples....
Just thinking again............ Since the Rocky program compensates for and corrects phase and amplitude errors, has anyone tried to see if it's sufficient to...
Rahul, ... Well, then, order a DDS-60 for each of the DDS chips. For the 9850's, order up the LPF parts from the original DDS board and, while you're at it,...
I've been working on a different way of generating a Quadrature clock for the SR-5 without having to change components over a wide frequency range. So far on...
Interesting ! Care to give us some more detail ? 73 Kees K5BCQ ... From: KD5NWA <KD5NWA@...> To: softrock40@yahoogroups.com Date: Thu, 01 Dec 2005 12:53:48...
And even more importantly (to me) what about the QXE board. I am really anxious Tony :-) 73 - Mike - K9JRI "James E. Gutshall" <jeg@...> wrote: Does...
I want to run a couple more test and make sure I'm not missing something major in my simulation and then I'll post it. Basically, the comparators compare the...
A few thoughts --- Spurs may be a minor problem due to a much greater signal level being input to the SR-40. I would be concerned about stability of the analog...
I have a Tayloe Detector board that uses an exclusice OR in place of the first FF. When fed with one output of the IQ VFO (a AD9854), works great with SDR...
QST and QEX had an article a few years back on a power meter using the 8307. I built the one in QEX. Works really great. Calibrated digital readout up to...
OK !! it can be made to work OK. I notice the AD spec says 50% duty cycle +/-10% but I've never seen what it actually is across the frequency range. Some of...
... I stand corrected. Milt -- No virus found in this outgoing message. Checked by AVG Free Edition. Version: 7.1.362 / Virus Database: 267.13.10/189 - Release...
Milt, Ahhh, didn't know about any RC network and yes you are right, that would create a doubler ....but Dave said the XOR was in place of the 1st FF. If you...
Fellow Xyloeans, Last night I managed to get audio from the Wolfson A/D, via the FPGA and FX2 over the USB2 at 480Mbps to the PC and out over PortAudio to the...
A doubler is created when you feed the signal into one pin of a XOR and a delayed version into the other pin, then what it really does is to detect edges on...
The only purpose of the XOR gate in question is to square up the clock signal to a 50% duty cycle so you don't need to have another divide by 2 flip-flop do...
Hi Phil, Good deal, sounds great! I am curious what sampling rate you were running the Wolfson chip at and whether your were doing both channels or just one...
I described a doubler and said that circuit is not one, but it's purpose is to insure 50% duty cycle on the clock. Then I proceeded to describe the rest of the...
The output of the XOR gate is definitely NOT at 50%. You get a short pulse on the the rising and falling edges of the input clock. The output is only used to...
It appears I was confused on how that (the QRP2001) circuit works. After looking at it on my scope, it does produce an approx. 50% duty cycle. The R-C...
Actgually, the first XOR gate is simply a squaring circuit. The negative feedback via the R/C simply biases the input to the on/off threshold of the gate. ...
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