unless I have totally missed the boat on this, but it seems in order to do something as simple as toggling a port pin I need to talk to 2 registers (PIOA_CODR...
I believe there's also a direct drive mode (and register) but you need to setup the mask register that protects the other I/O pins from being changed when you...
hello, i have a question regarding the AT91SAM7S-BasicUSART_USB example: i compiled and linked the example and installed the driver (atm6124ser.inf). the...
On the SAM7S part, the SAM-BA code is started by pulling the TST pin high with PA0, PA1, and PA2 also pulled high, then releasing the chip from reset. With the...
Hi James There is a new NV (non-volatile) bit which specifies whether the device starts the user firmware in FLASH or boots with the internal SAMBA startup...
Thanks for the info. Nice demo -- turning on LEDs and watching them on the webcam. What is the OS, stack, etc. you're running? ALSO .. on the SAM7S, there is a...
Hi James I have never used the USB download possibility. In fact I used SAMBA only for a few days until I intergrated a boot program in the flash which allows...
Anyone know Atmel's plans/schedule for production on these chips? They're listed in the Digikey catalog, but these is no stock and Atmel shows the part as...
Hello, i'm using AT91SAM7A3 on evaluation board ..-EK, i need to set te can baude rate, i tried with Xcalculator, but it doesn't work, somebody made a can...
I have two of their boards and love them. I got the boards and JTAG programmer from here. http://www.olimex.com/dev/arm_left.htm scroll down to SAM7-P64. here...
Hi Thanks but those are the AT91SAM7S not the SAM7X I use the SAM7-H64 already and it's a nice header board hopefully someone will do a SAM7X version Doug ... ...
... This is the prefered method. Bits that you write to PIO_CODR will get cleared and bits you write to PIO_SODR will get set. There is a good reason for this...
Hello, i'm using AT91SAM7A3, and i need to check the watchdog status via interrupt, i can't find on AIC register the specific settings. i activate the flag...
... AFAIK, the core has only just been announced. It takes a while for someone to tape out a part and fire up the barbecue to make commercial parts....
... Is there a difference between AT91SAMx and AT91R40008 ? ... with a latch) ? ... you'll need first te be running at at least 75 mHz, a ldr instruction takes...
hello charles, i experinced similar problems with the cdc example in conjunction with libusb. as you already mentioned as soons as the packet size is smaller...
I am presently wrestling with the same problems myself. Registers are configured, it should work...but it doesn't...and I have not yet been able to figure out...
For a second there you almost made it make sense to me. but the more I thought about it the more I still cannot see why to have it that way. You have me very...
... You are missing something. #3 is not atomic and can be interrupted part way through. A possibility is - the processor reads PIO in task A - Switches to...
... the second thing that puzzles me about this PIO_CODR = 1; PIO_SODR = 1; is what happens in the time between the statements ? is there a glitch on the pin ?...
I plan to implement SPI DMA Transfers using the AT91SAM7S256 eval board with an SPI Device, and I'd like some clarification on how the SPI_PDC pointers access...
hello, the data bit lenght depends on the SPI device. the at91sam7s supports data bit length from 8 to 16 bit. this is the reason why the receive and transmit...
I see both you points clearly now. thanks to both of you for helping me understand clearly. ... write ... two ... interrupted part way ... made to it by ... ...
... The above sequence sets pin 1 low, then sets it high again. ... That is true that it is half-cooked, but at a hardware level that happens anyway, even if...
